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[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [eth.c] - Blame information for rev 82

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1 19 jeremybenn 
/* ethernet.c -- Simulation of Ethernet MAC
2 
 
3 
   Copyright (C) 2001 by Erez Volk, erez@opencores.org
4 
                         Ivan Guzvinec, ivang@opencores.org
5 
   Copyright (C) 2008 Embecosm Limited
6 
 
7 
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
8 
 
9 
   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
10 
 
11 
   This program is free software; you can redistribute it and/or modify it
12 
   under the terms of the GNU General Public License as published by the Free
13 
   Software Foundation; either version 3 of the License, or (at your option)
14 
   any later version.
15 
 
16 
   This program is distributed in the hope that it will be useful, but WITHOUT
17 
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19 
   more details.
20 
 
21 
   You should have received a copy of the GNU General Public License along
22 
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
23 
 
24 
/* This program is commented throughout in a fashion suitable for processing
25 
   with Doxygen. */
26 
 
27 
 
28 
/* Autoconf and/or portability configuration */
29 
#include "config.h"
30 
#include "port.h"
31 
 
32 
/* System includes */
33 
#include <stdlib.h>
34 
#include <stdio.h>
35 
#include <sys/types.h>
36 
#include <sys/stat.h>
37 
#include <fcntl.h>
38 
#include <sys/poll.h>
39 
#include <sys/time.h>
40 
#include <unistd.h>
41 
#include <errno.h>
42 
#include <netinet/in.h>
43 
#include <sys/ioctl.h>
44 
#include <sys/socket.h>
45 
#include <net/if.h>
46 
 
47 
/* Package includes */
48 
#include "arch.h"
49 
#include "config.h"
50 
#include "abstract.h"
51 
#include "eth.h"
52 
#include "dma.h"
53 
#include "sim-config.h"
54 
#include "fields.h"
55 
#include "crc32.h"
56 
#include "vapi.h"
57 
#include "pic.h"
58 
#include "sched.h"
59 
#include "toplevel-support.h"
60 
#include "sim-cmd.h"
61 
 
62 
struct eth_device
63 
{
64 
  /* Is peripheral enabled */
65 
  int enabled;
66 
 
67 
  /* Base address in memory */
68 
  oraddr_t baseaddr;
69 
 
70 
  /* Which DMA controller is this MAC connected to */
71 
  unsigned dma;
72 
  unsigned tx_channel;
73 
  unsigned rx_channel;
74 
 
75 
  /* Our address */
76 
  unsigned char mac_address[ETHER_ADDR_LEN];
77 
 
78 
  /* interrupt line */
79 
  unsigned long mac_int;
80 
 
81 
  /* VAPI ID */
82 
  unsigned long base_vapi_id;
83 
 
84 
  /* RX and TX file names and handles */
85 
  char *rxfile, *txfile;
86 
  int txfd;
87 
  int rxfd;
88 
  off_t loopback_offset;
89 
 
90 
  /* Socket interface name */
91 
  char *sockif;
92 
 
93 
  int rtx_sock;
94 
  int rtx_type;
95 
  struct ifreq ifr;
96 
  fd_set rfds, wfds;
97 
 
98 
  /* Current TX state */
99 
  struct
100 
  {
101 
    unsigned long state;
102 
    unsigned long bd_index;
103 
    unsigned long bd;
104 
    unsigned long bd_addr;
105 
    unsigned working, waiting_for_dma, error;
106 
    long packet_length;
107 
    unsigned minimum_length, maximum_length;
108 
    unsigned add_crc;
109 
    unsigned crc_dly;
110 
    unsigned long crc_value;
111 
    long bytes_left, bytes_sent;
112 
  } tx;
113 
 
114 
  /* Current RX state */
115 
  struct
116 
  {
117 
    unsigned long state;
118 
    unsigned long bd_index;
119 
    unsigned long bd;
120 
    unsigned long bd_addr;
121 
    int fd;
122 
    off_t *offset;
123 
    unsigned working, error, waiting_for_dma;
124 
    long packet_length, bytes_read, bytes_left;
125 
  } rx;
126 
 
127 
  /* Visible registers */
128 
  struct
129 
  {
130 
    unsigned long moder;
131 
    unsigned long int_source;
132 
    unsigned long int_mask;
133 
    unsigned long ipgt;
134 
    unsigned long ipgr1;
135 
    unsigned long ipgr2;
136 
    unsigned long packetlen;
137 
    unsigned long collconf;
138 
    unsigned long tx_bd_num;
139 
    unsigned long controlmoder;
140 
    unsigned long miimoder;
141 
    unsigned long miicommand;
142 
    unsigned long miiaddress;
143 
    unsigned long miitx_data;
144 
    unsigned long miirx_data;
145 
    unsigned long miistatus;
146 
    unsigned long hash0;
147 
    unsigned long hash1;
148 
 
149 
    /* Buffer descriptors */
150 
    unsigned long bd_ram[ETH_BD_SPACE / 4];
151 
  } regs;
152 
 
153 
  unsigned char rx_buff[ETH_MAXPL];
154 
  unsigned char tx_buff[ETH_MAXPL];
155 
  unsigned char lo_buff[ETH_MAXPL];
156 
};
157 
 
158 
 
159 
/* simulator interface */
160 
static void eth_vapi_read (unsigned long id, unsigned long data, void *dat);
161 
/* register interface */
162 
static void eth_write32 (oraddr_t addr, uint32_t value, void *dat);
163 
static uint32_t eth_read32 (oraddr_t addr, void *dat);
164 
/* clock */
165 
static void eth_controller_tx_clock (void *);
166 
static void eth_controller_rx_clock (void *);
167 
/* utility functions */
168 
static ssize_t eth_read_rx_file (struct eth_device *, void *, size_t);
169 
static void eth_skip_rx_file (struct eth_device *, off_t);
170 
static void eth_rx_next_packet (struct eth_device *);
171 
static void eth_write_tx_bd_num (struct eth_device *, unsigned long value);
172 
/* ========================================================================= */
173 
/*  TX LOGIC                                                                 */
174 
/*---------------------------------------------------------------------------*/
175 
 
176 
/*
177 
 * TX clock
178 
 * Responsible for starting and finishing TX
179 
 */
180 
static void
181 
eth_controller_tx_clock (void *dat)
182 
{
183 
  struct eth_device *eth = dat;
184 
  int bAdvance = 1;
185 
#if HAVE_ETH_PHY
186 
  struct sockaddr_ll sll;
187 
#endif /* HAVE_ETH_PHY */
188 
  long nwritten = 0;
189 
  unsigned long read_word;
190 
 
191 
  switch (eth->tx.state)
192 
    {
193 
    case ETH_TXSTATE_IDLE:
194 
      eth->tx.state = ETH_TXSTATE_WAIT4BD;
195 
      break;
196 
    case ETH_TXSTATE_WAIT4BD:
197 
      /* Read buffer descriptor */
198 
      eth->tx.bd = eth->regs.bd_ram[eth->tx.bd_index];
199 
      eth->tx.bd_addr = eth->regs.bd_ram[eth->tx.bd_index + 1];
200 
 
201 
      if (TEST_FLAG (eth->tx.bd, ETH_TX_BD, READY))
202 
        {
203 
            /*****************/
204 
          /* initialize TX */
205 
          eth->tx.bytes_left = eth->tx.packet_length =
206 
            GET_FIELD (eth->tx.bd, ETH_TX_BD, LENGTH);
207 
          eth->tx.bytes_sent = 0;
208 
 
209 
          /*   Initialize error status bits */
210 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, DEFER);
211 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, COLLISION);
212 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, RETRANSMIT);
213 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, UNDERRUN);
214 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, NO_CARRIER);
215 
          SET_FIELD (eth->tx.bd, ETH_TX_BD, RETRY, 0);
216 
 
217 
          /* Find out minimum length */
218 
          if (TEST_FLAG (eth->tx.bd, ETH_TX_BD, PAD) ||
219 
              TEST_FLAG (eth->regs.moder, ETH_MODER, PAD))
220 
            eth->tx.minimum_length =
221 
              GET_FIELD (eth->regs.packetlen, ETH_PACKETLEN, MINFL);
222 
          else
223 
            eth->tx.minimum_length = eth->tx.packet_length;
224 
 
225 
          /* Find out maximum length */
226 
          if (TEST_FLAG (eth->regs.moder, ETH_MODER, HUGEN))
227 
            eth->tx.maximum_length = eth->tx.packet_length;
228 
          else
229 
            eth->tx.maximum_length =
230 
              GET_FIELD (eth->regs.packetlen, ETH_PACKETLEN, MAXFL);
231 
 
232 
          /* Do we need CRC on this packet? */
233 
          if (TEST_FLAG (eth->regs.moder, ETH_MODER, CRCEN) ||
234 
              (TEST_FLAG (eth->tx.bd, ETH_TX_BD, CRC) &&
235 
               TEST_FLAG (eth->tx.bd, ETH_TX_BD, LAST)))
236 
            eth->tx.add_crc = 1;
237 
          else
238 
            eth->tx.add_crc = 0;
239 
 
240 
          if (TEST_FLAG (eth->regs.moder, ETH_MODER, DLYCRCEN))
241 
            eth->tx.crc_dly = 1;
242 
          else
243 
            eth->tx.crc_dly = 0;
244 
          /* XXX - For now we skip CRC calculation */
245 
 
246 
          if (eth->rtx_type == ETH_RTX_FILE)
247 
            {
248 
              /* write packet length to file */
249 
              nwritten =
250 
                write (eth->txfd, &(eth->tx.packet_length),
251 
                       sizeof (eth->tx.packet_length));
252 
            }
253 
 
254 
            /************************************************/
255 
          /* start transmit with reading packet into FIFO */
256 
          eth->tx.state = ETH_TXSTATE_READFIFO;
257 
        }
258 
 
259 
      /* stay in this state if (TXEN && !READY) */
260 
      break;
261 
    case ETH_TXSTATE_READFIFO:
262 
#if 1
263 
      if (eth->tx.bytes_sent < eth->tx.packet_length)
264 
        {
265 
          read_word =
266 
            eval_direct32 (eth->tx.bytes_sent + eth->tx.bd_addr, 0, 0);
267 
          eth->tx_buff[eth->tx.bytes_sent] =
268 
            (unsigned char) (read_word >> 24);
269 
          eth->tx_buff[eth->tx.bytes_sent + 1] =
270 
            (unsigned char) (read_word >> 16);
271 
          eth->tx_buff[eth->tx.bytes_sent + 2] =
272 
            (unsigned char) (read_word >> 8);
273 
          eth->tx_buff[eth->tx.bytes_sent + 3] = (unsigned char) (read_word);
274 
          eth->tx.bytes_sent += 4;
275 
        }
276 
#else
277 
      if (eth->tx.bytes_sent < eth->tx.packet_length)
278 
        {
279 
          eth->tx_buff[eth->tx.bytes_sent] =
280 
            eval_direct8 (eth->tx.bytes_sent + eth->tx.bd_addr, 0, 0);
281 
          eth->tx.bytes_sent += 1;
282 
        }
283 
#endif
284 
      else
285 
        {
286 
          eth->tx.state = ETH_TXSTATE_TRANSMIT;
287 
        }
288 
      break;
289 
    case ETH_TXSTATE_TRANSMIT:
290 
      /* send packet */
291 
      switch (eth->rtx_type)
292 
        {
293 
        case ETH_RTX_FILE:
294 
          nwritten = write (eth->txfd, eth->tx_buff, eth->tx.packet_length);
295 
          break;
296 
#if HAVE_ETH_PHY
297 
        case ETH_RTX_SOCK:
298 
          memset (&sll, 0, sizeof (sll));
299 
          sll.sll_ifindex = eth->ifr.ifr_ifindex;
300 
          nwritten =
301 
            sendto (eth->rtx_sock, eth->tx_buff, eth->tx.packet_length, 0,
302 
                    (struct sockaddr *) &sll, sizeof (sll));
303 
#endif /* HAVE_ETH_PHY */
304 
        }
305 
 
306 
      /* set BD status */
307 
      if (nwritten == eth->tx.packet_length)
308 
        {
309 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, READY);
310 
          SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, TXB);
311 
 
312 
          eth->tx.state = ETH_TXSTATE_WAIT4BD;
313 
        }
314 
      else
315 
        {
316 
          /* XXX - implement retry mechanism here! */
317 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, READY);
318 
          CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, COLLISION);
319 
          SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, TXE);
320 
 
321 
          eth->tx.state = ETH_TXSTATE_WAIT4BD;
322 
        }
323 
 
324 
      eth->regs.bd_ram[eth->tx.bd_index] = eth->tx.bd;
325 
 
326 
      /* generate OK interrupt */
327 
      if (TEST_FLAG (eth->regs.int_mask, ETH_INT_MASK, TXE_M) ||
328 
          TEST_FLAG (eth->regs.int_mask, ETH_INT_MASK, TXB_M))
329 
        {
330 
          if (TEST_FLAG (eth->tx.bd, ETH_TX_BD, IRQ))
331 
            report_interrupt (eth->mac_int);
332 
        }
333 
 
334 
      /* advance to next BD */
335 
      if (bAdvance)
336 
        {
337 
          if (TEST_FLAG (eth->tx.bd, ETH_TX_BD, WRAP) ||
338 
              eth->tx.bd_index >= ETH_BD_COUNT)
339 
            eth->tx.bd_index = 0;
340 
          else
341 
            eth->tx.bd_index += 2;
342 
        }
343 
 
344 
      break;
345 
    }
346 
 
347 
  /* Reschedule */
348 
  SCHED_ADD (eth_controller_tx_clock, dat, 1);
349 
}
350 
 
351 
/* ========================================================================= */
352 
 
353 
 
354 
/* ========================================================================= */
355 
/*  RX LOGIC                                                                 */
356 
/*---------------------------------------------------------------------------*/
357 
 
358 
/*
359 
 * RX clock
360 
 * Responsible for starting and finishing RX
361 
 */
362 
static void
363 
eth_controller_rx_clock (void *dat)
364 
{
365 
  struct eth_device *eth = dat;
366 
  long nread;
367 
  unsigned long send_word;
368 
 
369 
 
370 
  switch (eth->rx.state)
371 
    {
372 
    case ETH_RXSTATE_IDLE:
373 
      eth->rx.state = ETH_RXSTATE_WAIT4BD;
374 
      break;
375 
 
376 
    case ETH_RXSTATE_WAIT4BD:
377 
      eth->rx.bd = eth->regs.bd_ram[eth->rx.bd_index];
378 
      eth->rx.bd_addr = eth->regs.bd_ram[eth->rx.bd_index + 1];
379 
 
380 
      if (TEST_FLAG (eth->rx.bd, ETH_RX_BD, READY))
381 
        {
382 
            /*****************/
383 
          /* Initialize RX */
384 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, MISS);
385 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, INVALID);
386 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, DRIBBLE);
387 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, UVERRUN);
388 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, COLLISION);
389 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, TOOBIG);
390 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, TOOSHORT);
391 
 
392 
          /* Setup file to read from */
393 
          if (TEST_FLAG (eth->regs.moder, ETH_MODER, LOOPBCK))
394 
            {
395 
              eth->rx.fd = eth->txfd;
396 
              eth->rx.offset = &(eth->loopback_offset);
397 
            }
398 
          else
399 
            {
400 
              eth->rx.fd = eth->rxfd;
401 
              eth->rx.offset = 0;
402 
            }
403 
          eth->rx.state = ETH_RXSTATE_RECV;
404 
        }
405 
      else if (!TEST_FLAG (eth->regs.moder, ETH_MODER, RXEN))
406 
        {
407 
          eth->rx.state = ETH_RXSTATE_IDLE;
408 
        }
409 
      else
410 
        {
411 
          nread =
412 
            recv (eth->rtx_sock, eth->rx_buff, ETH_MAXPL, /*MSG_PEEK | */
413 
                  MSG_DONTWAIT);
414 
          if (nread > 0)
415 
            {
416 
              SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, BUSY);
417 
              if (TEST_FLAG (eth->regs.int_mask, ETH_INT_MASK, BUSY_M))
418 
                report_interrupt (eth->mac_int);
419 
            }
420 
        }
421 
      break;
422 
 
423 
    case ETH_RXSTATE_RECV:
424 
      switch (eth->rtx_type)
425 
        {
426 
        case ETH_RTX_FILE:
427 
          /* Read packet length */
428 
          if (eth_read_rx_file
429 
              (eth, &(eth->rx.packet_length),
430 
               sizeof (eth->rx.packet_length)) <
431 
              sizeof (eth->rx.packet_length))
432 
            {
433 
              /* TODO: just do what real ethernet would do (some kind of error state) */
434 
              sim_done ();
435 
              break;
436 
            }
437 
 
438 
          /* Packet must be big enough to hold a header */
439 
          if (eth->rx.packet_length < ETHER_HDR_LEN)
440 
            {
441 
              eth_rx_next_packet (eth);
442 
 
443 
              eth->rx.state = ETH_RXSTATE_WAIT4BD;
444 
              break;
445 
            }
446 
 
447 
          eth->rx.bytes_read = 0;
448 
          eth->rx.bytes_left = eth->rx.packet_length;
449 
 
450 
          /* for now Read entire packet into memory */
451 
          nread = eth_read_rx_file (eth, eth->rx_buff, eth->rx.bytes_left);
452 
          if (nread < eth->rx.bytes_left)
453 
            {
454 
              eth->rx.error = 1;
455 
              break;
456 
            }
457 
 
458 
          eth->rx.packet_length = nread;
459 
          eth->rx.bytes_left = nread;
460 
          eth->rx.bytes_read = 0;
461 
 
462 
          eth->rx.state = ETH_RXSTATE_WRITEFIFO;
463 
 
464 
          break;
465 
 
466 
        case ETH_RTX_SOCK:
467 
          nread = recv (eth->rtx_sock, eth->rx_buff, ETH_MAXPL, MSG_DONTWAIT);
468 
 
469 
          if (nread == 0)
470 
            {
471 
              break;
472 
            }
473 
          else if (nread < 0)
474 
            {
475 
              if (errno != EAGAIN)
476 
                {
477 
                  break;
478 
                }
479 
              else
480 
                break;
481 
            }
482 
          /* If not promiscouos mode, check the destination address */
483 
          if (!TEST_FLAG (eth->regs.moder, ETH_MODER, PRO))
484 
            {
485 
              if (TEST_FLAG (eth->regs.moder, ETH_MODER, IAM)
486 
                  && (eth->rx_buff[0] & 1))
487 
                {
488 
                  /* Nothing for now */
489 
                }
490 
 
491 
              if (eth->mac_address[5] != eth->rx_buff[0] ||
492 
                  eth->mac_address[4] != eth->rx_buff[1] ||
493 
                  eth->mac_address[3] != eth->rx_buff[2] ||
494 
                  eth->mac_address[2] != eth->rx_buff[3] ||
495 
                  eth->mac_address[1] != eth->rx_buff[4] ||
496 
                  eth->mac_address[0] != eth->rx_buff[5])
497 
                break;
498 
            }
499 
 
500 
          eth->rx.packet_length = nread;
501 
          eth->rx.bytes_left = nread;
502 
          eth->rx.bytes_read = 0;
503 
 
504 
          eth->rx.state = ETH_RXSTATE_WRITEFIFO;
505 
 
506 
          break;
507 
        case ETH_RTX_VAPI:
508 
          break;
509 
        }
510 
      break;
511 
 
512 
    case ETH_RXSTATE_WRITEFIFO:
513 
#if 1
514 
      send_word = ((unsigned long) eth->rx_buff[eth->rx.bytes_read] << 24) |
515 
        ((unsigned long) eth->rx_buff[eth->rx.bytes_read + 1] << 16) |
516 
        ((unsigned long) eth->rx_buff[eth->rx.bytes_read + 2] << 8) |
517 
        ((unsigned long) eth->rx_buff[eth->rx.bytes_read + 3]);
518 
      set_direct32 (eth->rx.bd_addr + eth->rx.bytes_read, send_word, 0, 0);
519 
      /* update counters */
520 
      eth->rx.bytes_left -= 4;
521 
      eth->rx.bytes_read += 4;
522 
#else
523 
      set_direct8 (eth->rx.bd_addr + eth->rx.bytes_read,
524 
                   eth->rx_buff[eth->rx.bytes_read], 0, 0);
525 
      eth->rx.bytes_left -= 1;
526 
      eth->rx.bytes_read += 1;
527 
#endif
528 
 
529 
      if (eth->rx.bytes_left <= 0)
530 
        {
531 
          /* Write result to bd */
532 
          SET_FIELD (eth->rx.bd, ETH_RX_BD, LENGTH, eth->rx.packet_length);
533 
          CLEAR_FLAG (eth->rx.bd, ETH_RX_BD, READY);
534 
          SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, RXB);
535 
 
536 
          if (eth->rx.packet_length <
537 
              (GET_FIELD (eth->regs.packetlen, ETH_PACKETLEN, MINFL) - 4))
538 
            SET_FLAG (eth->rx.bd, ETH_RX_BD, TOOSHORT);
539 
          if (eth->rx.packet_length >
540 
              GET_FIELD (eth->regs.packetlen, ETH_PACKETLEN, MAXFL))
541 
            SET_FLAG (eth->rx.bd, ETH_RX_BD, TOOBIG);
542 
 
543 
          eth->regs.bd_ram[eth->rx.bd_index] = eth->rx.bd;
544 
 
545 
          /* advance to next BD */
546 
          if (TEST_FLAG (eth->rx.bd, ETH_RX_BD, WRAP)
547 
              || eth->rx.bd_index >= ETH_BD_COUNT)
548 
            eth->rx.bd_index = eth->regs.tx_bd_num << 1;
549 
          else
550 
            eth->rx.bd_index += 2;
551 
 
552 
          if ((TEST_FLAG (eth->regs.int_mask, ETH_INT_MASK, RXB_M)) &&
553 
              (TEST_FLAG (eth->rx.bd, ETH_RX_BD, IRQ)))
554 
            {
555 
              report_interrupt (eth->mac_int);
556 
            }
557 
 
558 
          /* ready to receive next packet */
559 
          eth->rx.state = ETH_RXSTATE_IDLE;
560 
        }
561 
      break;
562 
    }
563 
 
564 
  /* Reschedule */
565 
  SCHED_ADD (eth_controller_rx_clock, dat, 1);
566 
}
567 
 
568 
/* ========================================================================= */
569 
/* Move to next RX BD */
570 
static void
571 
eth_rx_next_packet (struct eth_device *eth)
572 
{
573 
  /* Skip any possible leftovers */
574 
  if (eth->rx.bytes_left)
575 
    eth_skip_rx_file (eth, eth->rx.bytes_left);
576 
}
577 
 
578 
/* "Skip" bytes in RX file */
579 
static void
580 
eth_skip_rx_file (struct eth_device *eth, off_t count)
581 
{
582 
  eth->rx.offset += count;
583 
}
584 
 
585 
/*
586 
 * Utility function to read from the ethernet RX file
587 
 * This function moves the file pointer to the current place in the packet before reading
588 
 */
589 
static ssize_t
590 
eth_read_rx_file (struct eth_device *eth, void *buf, size_t count)
591 
{
592 
  ssize_t result;
593 
 
594 
  if (eth->rx.fd <= 0)
595 
    {
596 
      return 0;
597 
    }
598 
 
599 
  if (eth->rx.offset)
600 
    if (lseek (eth->rx.fd, *(eth->rx.offset), SEEK_SET) == (off_t) - 1)
601 
      {
602 
        return 0;
603 
      }
604 
 
605 
  result = read (eth->rx.fd, buf, count);
606 
  if (eth->rx.offset && result >= 0)
607 
    *(eth->rx.offset) += result;
608 
 
609 
  return result;
610 
}
611 
 
612 
/* ========================================================================= */
613 
 
614 
/*
615 
  Reset. Initializes all registers to default and places devices in
616 
         memory address space.
617 
*/
618 
static void
619 
eth_reset (void *dat)
620 
{
621 
  struct eth_device *eth = dat;
622 
#if HAVE_ETH_PHY
623 
  int j;
624 
  struct sockaddr_ll sll;
625 
#endif /* HAVE_ETH_PHY */
626 
 
627 
  if (eth->baseaddr != 0)
628 
    {
629 
      switch (eth->rtx_type)
630 
        {
631 
        case ETH_RTX_FILE:
632 
          /* (Re-)open TX/RX files */
633 
          if (eth->rxfd > 0)
634 
            close (eth->rxfd);
635 
          if (eth->txfd > 0)
636 
            close (eth->txfd);
637 
          eth->rxfd = eth->txfd = -1;
638 
 
639 
          if ((eth->rxfd = open (eth->rxfile, O_RDONLY)) < 0)
640 
            fprintf (stderr, "Cannot open Ethernet RX file \"%s\"\n",
641 
                     eth->rxfile);
642 
          if ((eth->txfd = open (eth->txfile, O_RDWR | O_CREAT | O_APPEND
643 
#if defined(O_SYNC)             /* BSD / Mac OS X manual doesn't know about O_SYNC */
644 
                                 | O_SYNC
645 
#endif
646 
                                 ,
647 
                                 S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH)) < 0)
648 
            fprintf (stderr, "Cannot open Ethernet TX file \"%s\"\n",
649 
                     eth->txfile);
650 
          eth->loopback_offset = lseek (eth->txfd, 0, SEEK_END);
651 
 
652 
          break;
653 
#if HAVE_ETH_PHY
654 
        case ETH_RTX_SOCK:
655 
          /* (Re-)open TX/RX sockets */
656 
          if (eth->rtx_sock != 0)
657 
            break;
658 
 
659 
          eth->rtx_sock = socket (PF_PACKET, SOCK_RAW, htons (ETH_P_ALL));
660 
          if (eth->rtx_sock == -1)
661 
            {
662 
              fprintf (stderr, "Cannot open rtx_sock.\n");
663 
              return;
664 
            }
665 
 
666 
          /* get interface index number */
667 
          memset (&(eth->ifr), 0, sizeof (eth->ifr));
668 
          strncpy (eth->ifr.ifr_name, eth->sockif, IFNAMSIZ);
669 
          if (ioctl (eth->rtx_sock, SIOCGIFINDEX, &(eth->ifr)) == -1)
670 
            {
671 
              fprintf (stderr, "SIOCGIFINDEX failed!\n");
672 
              return;
673 
            }
674 
 
675 
          /* Bind to interface... */
676 
          memset (&sll, 0xff, sizeof (sll));
677 
          sll.sll_family = AF_PACKET;   /* allways AF_PACKET */
678 
          sll.sll_protocol = htons (ETH_P_ALL);
679 
          sll.sll_ifindex = eth->ifr.ifr_ifindex;
680 
          if (bind (eth->rtx_sock, (struct sockaddr *) &sll, sizeof (sll)) ==
681 
              -1)
682 
            {
683 
              fprintf (stderr, "Error bind().\n");
684 
              return;
685 
            }
686 
 
687 
          /* first, flush all received packets. */
688 
          do
689 
            {
690 
              fd_set fds;
691 
              struct timeval t;
692 
 
693 
              FD_ZERO (&fds);
694 
              FD_SET (eth->rtx_sock, &fds);
695 
              memset (&t, 0, sizeof (t));
696 
              j = select (FD_SETSIZE, &fds, NULL, NULL, &t);
697 
              if (j > 0)
698 
                recv (eth->rtx_sock, eth->rx_buff, j, 0);
699 
            }
700 
          while (j);
701 
 
702 
          break;
703 
#else /* HAVE_ETH_PHY */
704 
        case ETH_RTX_SOCK:
705 
          fprintf (stderr,
706 
                   "Ethernet phy not enabled in this configuration.  Configure with --enable-ethphy.\n");
707 
          exit (1);
708 
          break;
709 
#endif /* HAVE_ETH_PHY */
710 
        }
711 
 
712 
      /* Set registers to default values */
713 
      memset (&(eth->regs), 0, sizeof (eth->regs));
714 
      eth->regs.moder = 0x0000A000;
715 
      eth->regs.ipgt = 0x00000012;
716 
      eth->regs.ipgr1 = 0x0000000C;
717 
      eth->regs.ipgr2 = 0x00000012;
718 
      eth->regs.packetlen = 0x003C0600;
719 
      eth->regs.collconf = 0x000F003F;
720 
      eth->regs.miimoder = 0x00000064;
721 
      eth->regs.tx_bd_num = 0x00000040;
722 
 
723 
      /* Initialize TX/RX status */
724 
      memset (&(eth->tx), 0, sizeof (eth->tx));
725 
      memset (&(eth->rx), 0, sizeof (eth->rx));
726 
      eth->rx.bd_index = eth->regs.tx_bd_num << 1;
727 
 
728 
      /* Initialize VAPI */
729 
      if (eth->base_vapi_id)
730 
        {
731 
          vapi_install_multi_handler (eth->base_vapi_id, ETH_NUM_VAPI_IDS,
732 
                                      eth_vapi_read, dat);
733 
        }
734 
    }
735 
}
736 
 
737 
/* ========================================================================= */
738 
 
739 
 
740 
/*
741 
  Print register values on stdout
742 
*/
743 
static void
744 
eth_status (void *dat)
745 
{
746 
  struct eth_device *eth = dat;
747 
 
748 
  PRINTF ("\nEthernet MAC at 0x%" PRIxADDR ":\n", eth->baseaddr);
749 
  PRINTF ("MODER        : 0x%08lX\n", eth->regs.moder);
750 
  PRINTF ("INT_SOURCE   : 0x%08lX\n", eth->regs.int_source);
751 
  PRINTF ("INT_MASK     : 0x%08lX\n", eth->regs.int_mask);
752 
  PRINTF ("IPGT         : 0x%08lX\n", eth->regs.ipgt);
753 
  PRINTF ("IPGR1        : 0x%08lX\n", eth->regs.ipgr1);
754 
  PRINTF ("IPGR2        : 0x%08lX\n", eth->regs.ipgr2);
755 
  PRINTF ("PACKETLEN    : 0x%08lX\n", eth->regs.packetlen);
756 
  PRINTF ("COLLCONF     : 0x%08lX\n", eth->regs.collconf);
757 
  PRINTF ("TX_BD_NUM    : 0x%08lX\n", eth->regs.tx_bd_num);
758 
  PRINTF ("CTRLMODER    : 0x%08lX\n", eth->regs.controlmoder);
759 
  PRINTF ("MIIMODER     : 0x%08lX\n", eth->regs.miimoder);
760 
  PRINTF ("MIICOMMAND   : 0x%08lX\n", eth->regs.miicommand);
761 
  PRINTF ("MIIADDRESS   : 0x%08lX\n", eth->regs.miiaddress);
762 
  PRINTF ("MIITX_DATA   : 0x%08lX\n", eth->regs.miitx_data);
763 
  PRINTF ("MIIRX_DATA   : 0x%08lX\n", eth->regs.miirx_data);
764 
  PRINTF ("MIISTATUS    : 0x%08lX\n", eth->regs.miistatus);
765 
  PRINTF ("MAC Address  : %02X:%02X:%02X:%02X:%02X:%02X\n",
766 
          eth->mac_address[0], eth->mac_address[1], eth->mac_address[2],
767 
          eth->mac_address[3], eth->mac_address[4], eth->mac_address[5]);
768 
  PRINTF ("HASH0        : 0x%08lX\n", eth->regs.hash0);
769 
  PRINTF ("HASH1        : 0x%08lX\n", eth->regs.hash1);
770 
}
771 
 
772 
/* ========================================================================= */
773 
 
774 
 
775 
/*
776 
  Read a register
777 
*/
778 
static uint32_t
779 
eth_read32 (oraddr_t addr, void *dat)
780 
{
781 
  struct eth_device *eth = dat;
782 
 
783 
  switch (addr)
784 
    {
785 
    case ETH_MODER:
786 
      return eth->regs.moder;
787 
    case ETH_INT_SOURCE:
788 
      return eth->regs.int_source;
789 
    case ETH_INT_MASK:
790 
      return eth->regs.int_mask;
791 
    case ETH_IPGT:
792 
      return eth->regs.ipgt;
793 
    case ETH_IPGR1:
794 
      return eth->regs.ipgr1;
795 
    case ETH_IPGR2:
796 
      return eth->regs.ipgr2;
797 
    case ETH_PACKETLEN:
798 
      return eth->regs.packetlen;
799 
    case ETH_COLLCONF:
800 
      return eth->regs.collconf;
801 
    case ETH_TX_BD_NUM:
802 
      return eth->regs.tx_bd_num;
803 
    case ETH_CTRLMODER:
804 
      return eth->regs.controlmoder;
805 
    case ETH_MIIMODER:
806 
      return eth->regs.miimoder;
807 
    case ETH_MIICOMMAND:
808 
      return eth->regs.miicommand;
809 
    case ETH_MIIADDRESS:
810 
      return eth->regs.miiaddress;
811 
    case ETH_MIITX_DATA:
812 
      return eth->regs.miitx_data;
813 
    case ETH_MIIRX_DATA:
814 
      return eth->regs.miirx_data;
815 
    case ETH_MIISTATUS:
816 
      return eth->regs.miistatus;
817 
    case ETH_MAC_ADDR0:
818 
      return (((unsigned long) eth->mac_address[3]) << 24) |
819 
        (((unsigned long) eth->mac_address[2]) << 16) |
820 
        (((unsigned long) eth->mac_address[1]) << 8) |
821 
        (unsigned long) eth->mac_address[0];
822 
    case ETH_MAC_ADDR1:
823 
      return (((unsigned long) eth->mac_address[5]) << 8) |
824 
        (unsigned long) eth->mac_address[4];
825 
    case ETH_HASH0:
826 
      return eth->regs.hash0;
827 
    case ETH_HASH1:
828 
      return eth->regs.hash1;
829 
      /*case ETH_DMA_RX_TX: return eth_rx( eth ); */
830 
    }
831 
 
832 
  if ((addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE))
833 
    return eth->regs.bd_ram[(addr - ETH_BD_BASE) / 4];
834 
 
835 
  PRINTF ("eth_read32( 0x%" PRIxADDR " ): Illegal address\n",
836 
          addr + eth->baseaddr);
837 
  return 0;
838 
}
839 
 
840 
/* ========================================================================= */
841 
 
842 
 
843 
/*
844 
  Write a register
845 
*/
846 
static void
847 
eth_write32 (oraddr_t addr, uint32_t value, void *dat)
848 
{
849 
  struct eth_device *eth = dat;
850 
 
851 
  switch (addr)
852 
    {
853 
    case ETH_MODER:
854 
 
855 
      if (!TEST_FLAG (eth->regs.moder, ETH_MODER, RXEN) &&
856 
          TEST_FLAG (value, ETH_MODER, RXEN))
857 
        SCHED_ADD (eth_controller_rx_clock, dat, 1);
858 
      else if (!TEST_FLAG (value, ETH_MODER, RXEN))
859 
        SCHED_FIND_REMOVE (eth_controller_rx_clock, dat);
860 
 
861 
      if (!TEST_FLAG (eth->regs.moder, ETH_MODER, TXEN) &&
862 
          TEST_FLAG (value, ETH_MODER, TXEN))
863 
        SCHED_ADD (eth_controller_tx_clock, dat, 1);
864 
      else if (!TEST_FLAG (value, ETH_MODER, TXEN))
865 
        SCHED_FIND_REMOVE (eth_controller_tx_clock, dat);
866 
 
867 
      eth->regs.moder = value;
868 
 
869 
      if (TEST_FLAG (value, ETH_MODER, RST))
870 
        eth_reset (dat);
871 
      return;
872 
    case ETH_INT_SOURCE:
873 
      if (!(eth->regs.int_source & ~value) && eth->regs.int_source)
874 
        clear_interrupt (eth->mac_int);
875 
      eth->regs.int_source &= ~value;
876 
      return;
877 
    case ETH_INT_MASK:
878 
      eth->regs.int_mask = value;
879 
      return;
880 
    case ETH_IPGT:
881 
      eth->regs.ipgt = value;
882 
      return;
883 
    case ETH_IPGR1:
884 
      eth->regs.ipgr1 = value;
885 
      return;
886 
    case ETH_IPGR2:
887 
      eth->regs.ipgr2 = value;
888 
      return;
889 
    case ETH_PACKETLEN:
890 
      eth->regs.packetlen = value;
891 
      return;
892 
    case ETH_COLLCONF:
893 
      eth->regs.collconf = value;
894 
      return;
895 
    case ETH_TX_BD_NUM:
896 
      eth_write_tx_bd_num (eth, value);
897 
      return;
898 
    case ETH_CTRLMODER:
899 
      eth->regs.controlmoder = value;
900 
      return;
901 
    case ETH_MIIMODER:
902 
      eth->regs.miimoder = value;
903 
      return;
904 
    case ETH_MIICOMMAND:
905 
      eth->regs.miicommand = value;
906 
      return;
907 
    case ETH_MIIADDRESS:
908 
      eth->regs.miiaddress = value;
909 
      return;
910 
    case ETH_MIITX_DATA:
911 
      eth->regs.miitx_data = value;
912 
      return;
913 
    case ETH_MIIRX_DATA:
914 
      eth->regs.miirx_data = value;
915 
      return;
916 
    case ETH_MIISTATUS:
917 
      eth->regs.miistatus = value;
918 
      return;
919 
    case ETH_MAC_ADDR0:
920 
      eth->mac_address[0] = value & 0xFF;
921 
      eth->mac_address[1] = (value >> 8) & 0xFF;
922 
      eth->mac_address[2] = (value >> 16) & 0xFF;
923 
      eth->mac_address[3] = (value >> 24) & 0xFF;
924 
      return;
925 
    case ETH_MAC_ADDR1:
926 
      eth->mac_address[4] = value & 0xFF;
927 
      eth->mac_address[5] = (value >> 8) & 0xFF;
928 
      return;
929 
    case ETH_HASH0:
930 
      eth->regs.hash0 = value;
931 
      return;
932 
    case ETH_HASH1:
933 
      eth->regs.hash1 = value;
934 
      return;
935 
 
936 
      /*case ETH_DMA_RX_TX: eth_tx( eth, value ); return; */
937 
    }
938 
 
939 
  if ((addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE))
940 
    {
941 
      eth->regs.bd_ram[(addr - ETH_BD_BASE) / 4] = value;
942 
      return;
943 
    }
944 
 
945 
  PRINTF ("eth_write32( 0x%" PRIxADDR " ): Illegal address\n",
946 
          addr + eth->baseaddr);
947 
  return;
948 
}
949 
 
950 
/* ========================================================================= */
951 
 
952 
 
953 
/*
954 
 *   VAPI connection to outside
955 
 */
956 
static void
957 
eth_vapi_read (unsigned long id, unsigned long data, void *dat)
958 
{
959 
  unsigned long which;
960 
  struct eth_device *eth = dat;
961 
 
962 
  which = id - eth->base_vapi_id;
963 
 
964 
  if (!eth)
965 
    {
966 
      return;
967 
    }
968 
 
969 
  switch (which)
970 
    {
971 
    case ETH_VAPI_DATA:
972 
      break;
973 
    case ETH_VAPI_CTRL:
974 
      break;
975 
    }
976 
}
977 
 
978 
/* ========================================================================= */
979 
 
980 
 
981 
/* When TX_BD_NUM is written, also reset current RX BD index */
982 
static void
983 
eth_write_tx_bd_num (struct eth_device *eth, unsigned long value)
984 
{
985 
  eth->regs.tx_bd_num = value & 0xFF;
986 
  eth->rx.bd_index = eth->regs.tx_bd_num << 1;
987 
}
988 
 
989 
/* ========================================================================= */
990 
 
991 
/*-----------------------------------------------[ Ethernet configuration ]---*/
992 
 
993 
 
994 
/*---------------------------------------------------------------------------*/
995 
/*!Enable or disable the Ethernet interface
996 
 
997 
   @param[in] val  The value to use
998 
   @param[in] dat  The config data structure                                 */
999 
/*---------------------------------------------------------------------------*/
1000 
static void
1001 
eth_enabled (union param_val  val,
1002 
             void            *dat)
1003 
{
1004 
  struct eth_device *eth = dat;
1005 
 
1006 
  eth->enabled = val.int_val;
1007 
 
1008 
}       /* eth_enabled() */
1009 
 
1010 
 
1011 
/*---------------------------------------------------------------------------*/
1012 
/*!Set the Ethernet interface base address
1013 
 
1014 
   @param[in] val  The value to use
1015 
   @param[in] dat  The config data structure                                 */
1016 
/*---------------------------------------------------------------------------*/
1017 
static void
1018 
eth_baseaddr (union param_val  val,
1019 
              void            *dat)
1020 
{
1021 
  struct eth_device *eth = dat;
1022 
 
1023 
  eth->baseaddr = val.addr_val;
1024 
 
1025 
}       /* eth_baseaddr() */
1026 
 
1027 
 
1028 
/*---------------------------------------------------------------------------*/
1029 
/*!Set the Ethernet DMA port
1030 
 
1031 
   This is not currently supported, so a warning message is printed.
1032 
 
1033 
   @param[in] val  The value to use
1034 
   @param[in] dat  The config data structure                                 */
1035 
/*---------------------------------------------------------------------------*/
1036 
static void
1037 
eth_dma (union param_val  val,
1038 
         void            *dat)
1039 
{
1040 
  struct eth_device *eth = dat;
1041 
 
1042 
  fprintf (stderr, "Warning: External Ethernet DMA not currently supported\n");
1043 
  eth->dma = val.addr_val;
1044 
 
1045 
}       /* eth_dma() */
1046 
 
1047 
 
1048 
/*---------------------------------------------------------------------------*/
1049 
/*!Set the Ethernet IRQ
1050 
 
1051 
   @param[in] val  The value to use
1052 
   @param[in] dat  The config data structure                                 */
1053 
/*---------------------------------------------------------------------------*/
1054 
static void
1055 
eth_irq (union param_val  val,
1056 
         void            *dat)
1057 
{
1058 
  struct eth_device *eth = dat;
1059 
 
1060 
  eth->mac_int = val.int_val;
1061 
 
1062 
}       /* eth_irq() */
1063 
 
1064 
 
1065 
/*---------------------------------------------------------------------------*/
1066 
/*!Set the Ethernet interface type
1067 
 
1068 
   Currently two types are supported, file and socket. Use of the socket
1069 
   requires a compile time option.
1070 
 
1071 
   @param[in] val  The value to use. 0 for file, 1 for socket.
1072 
   @param[in] dat  The config data structure                                 */
1073 
/*---------------------------------------------------------------------------*/
1074 
static void
1075 
eth_rtx_type (union param_val  val,
1076 
              void            *dat)
1077 
{
1078 
  struct eth_device *eth = dat;
1079 
 
1080 
  if (val.int_val)
1081 
    {
1082 
#ifndef HAVE_ETH_PHY
1083 
      fprintf (stderr, "Warning: Ethernet PHY socket not enabled in this "
1084 
               "configuration (configure with --enable-ethphy): ignored\n");
1085 
      return;
1086 
#endif
1087 
    }
1088 
 
1089 
  eth->rtx_type = val.int_val;
1090 
 
1091 
}       /* eth_rtx_type() */
1092 
 
1093 
 
1094 
/*---------------------------------------------------------------------------*/
1095 
/*!Set the Ethernet DMA Rx channel
1096 
 
1097 
   External DMA is not currently supported, so a warning message is printed.
1098 
 
1099 
   @param[in] val  The value to use
1100 
   @param[in] dat  The config data structure                                 */
1101 
/*---------------------------------------------------------------------------*/
1102 
static void
1103 
eth_rx_channel (union param_val  val,
1104 
                void            *dat)
1105 
{
1106 
  struct eth_device *eth = dat;
1107 
 
1108 
  fprintf (stderr, "Warning: External Ethernet DMA not currently supported: "
1109 
           "Rx channel ignored\n");
1110 
  eth->rx_channel = val.int_val;
1111 
 
1112 
}       /* eth_rx_channel() */
1113 
 
1114 
 
1115 
/*---------------------------------------------------------------------------*/
1116 
/*!Set the Ethernet DMA Tx channel
1117 
 
1118 
   External DMA is not currently supported, so a warning message is printed.
1119 
 
1120 
   @param[in] val  The value to use
1121 
   @param[in] dat  The config data structure                                 */
1122 
/*---------------------------------------------------------------------------*/
1123 
static void
1124 
eth_tx_channel (union param_val  val,
1125 
                void            *dat)
1126 
{
1127 
  struct eth_device *eth = dat;
1128 
 
1129 
  fprintf (stderr, "Warning: External Ethernet DMA not currently supported: "
1130 
           "Tx channel ignored\n");
1131 
  eth->tx_channel = val.int_val;
1132 
 
1133 
}       /* eth_tx_channel() */
1134 
 
1135 
 
1136 
/*---------------------------------------------------------------------------*/
1137 
/*!Set the Ethernet DMA Rx file
1138 
 
1139 
   Free any previously allocated value.
1140 
 
1141 
   @param[in] val  The value to use
1142 
   @param[in] dat  The config data structure                                 */
1143 
/*---------------------------------------------------------------------------*/
1144 
static void
1145 
eth_rxfile (union param_val  val,
1146 
            void            *dat)
1147 
{
1148 
  struct eth_device *eth = dat;
1149 
 
1150 
  if (NULL != eth->rxfile)
1151 
    {
1152 
      free (eth->rxfile);
1153 
      eth->rxfile = NULL;
1154 
    }
1155 
 
1156 
  if (!(eth->rxfile = strdup (val.str_val)))
1157 
    {
1158 
      fprintf (stderr, "Peripheral Ethernet: Run out of memory\n");
1159 
      exit (-1);
1160 
    }
1161 
}       /* eth_rxfile() */
1162 
 
1163 
 
1164 
/*---------------------------------------------------------------------------*/
1165 
/*!Set the Ethernet DMA Tx file
1166 
 
1167 
   Free any previously allocated value.
1168 
 
1169 
   @param[in] val  The value to use
1170 
   @param[in] dat  The config data structure                                 */
1171 
/*---------------------------------------------------------------------------*/
1172 
static void
1173 
eth_txfile (union param_val  val,
1174 
            void            *dat)
1175 
{
1176 
  struct eth_device *eth = dat;
1177 
 
1178 
  if (NULL != eth->txfile)
1179 
    {
1180 
      free (eth->txfile);
1181 
      eth->txfile = NULL;
1182 
    }
1183 
 
1184 
  if (!(eth->txfile = strdup (val.str_val)))
1185 
    {
1186 
      fprintf (stderr, "Peripheral Ethernet: Run out of memory\n");
1187 
      exit (-1);
1188 
    }
1189 
}       /* eth_txfile() */
1190 
 
1191 
 
1192 
/*---------------------------------------------------------------------------*/
1193 
/*!Set the Ethernet socket interface
1194 
 
1195 
   Free any previously allocated value. This is only meaningful if the socket
1196 
   interface is configured.
1197 
 
1198 
   @param[in] val  The value to use
1199 
   @param[in] dat  The config data structure                                 */
1200 
/*---------------------------------------------------------------------------*/
1201 
static void
1202 
eth_sockif (union param_val  val,
1203 
            void            *dat)
1204 
{
1205 
  struct eth_device *eth = dat;
1206 
 
1207 
#ifndef HAVE_ETH_PHY
1208 
  fprintf (stderr, "Warning: Ethernet PHY socket not enabled in this "
1209 
           "configuration (configure with --enable-ethphy): "
1210 
           "sockif ignored\n");
1211 
  return;
1212 
#endif
1213 
 
1214 
  if (NULL != eth->sockif)
1215 
    {
1216 
      free (eth->sockif);
1217 
      eth->sockif = NULL;
1218 
    }
1219 
 
1220 
  if (!(eth->sockif = strdup (val.str_val)))
1221 
    {
1222 
      fprintf (stderr, "Peripheral Ethernet: Run out of memory\n");
1223 
      exit (-1);
1224 
    }
1225 
}       /* eth_sockif() */
1226 
 
1227 
 
1228 
static void
1229 
eth_vapi_id (union param_val  val,
1230 
             void            *dat)
1231 
{
1232 
  struct eth_device *eth = dat;
1233 
  eth->base_vapi_id = val.int_val;
1234 
}
1235 
 
1236 
/*---------------------------------------------------------------------------*/
1237 
/*!Initialize a new Ethernet configuration
1238 
 
1239 
   ALL parameters are set explicitly to default values.                      */
1240 
/*---------------------------------------------------------------------------*/
1241 
static void *
1242 
eth_sec_start (void)
1243 
{
1244 
  struct eth_device *new = malloc (sizeof (struct eth_device));
1245 
 
1246 
  if (!new)
1247 
    {
1248 
      fprintf (stderr, "Peripheral Eth: Run out of memory\n");
1249 
      exit (-1);
1250 
    }
1251 
 
1252 
  memset (new, 0, sizeof (struct eth_device));
1253 
 
1254 
  new->enabled      = 1;
1255 
  new->baseaddr     = 0;
1256 
  new->dma          = 0;
1257 
  new->mac_int      = 0;
1258 
  new->rtx_type     = 0;
1259 
  new->rx_channel   = 0;
1260 
  new->tx_channel   = 0;
1261 
  new->rxfile       = strdup ("eth_rx");
1262 
  new->txfile       = strdup ("eth_tx");
1263 
  new->sockif       = strdup ("or1ksim_eth");
1264 
  new->base_vapi_id = 0;
1265 
 
1266 
  return new;
1267 
}
1268 
 
1269 
static void
1270 
eth_sec_end (void *dat)
1271 
{
1272 
  struct eth_device *eth = dat;
1273 
  struct mem_ops ops;
1274 
 
1275 
  if (!eth->enabled)
1276 
    {
1277 
      free (eth->rxfile);
1278 
      free (eth->txfile);
1279 
      free (eth->sockif);
1280 
      free (eth);
1281 
      return;
1282 
    }
1283 
 
1284 
  memset (&ops, 0, sizeof (struct mem_ops));
1285 
 
1286 
  ops.readfunc32 = eth_read32;
1287 
  ops.writefunc32 = eth_write32;
1288 
  ops.read_dat32 = dat;
1289 
  ops.write_dat32 = dat;
1290 
 
1291 
  /* FIXME: Correct delay? */
1292 
  ops.delayr = 2;
1293 
  ops.delayw = 2;
1294 
  reg_mem_area (eth->baseaddr, ETH_ADDR_SPACE, 0, &ops);
1295 
  reg_sim_stat (eth_status, dat);
1296 
  reg_sim_reset (eth_reset, dat);
1297 
}
1298 
 
1299 
 
1300 
/*---------------------------------------------------------------------------*/
1301 
/*!Register a new Ethernet configuration                                     */
1302 
/*---------------------------------------------------------------------------*/
1303 
void
1304 
reg_ethernet_sec ()
1305 
{
1306 
  struct config_section *sec =
1307 
    reg_config_sec ("ethernet", eth_sec_start, eth_sec_end);
1308 
 
1309 
  reg_config_param (sec, "enabled",    paramt_int,  eth_enabled);
1310 
  reg_config_param (sec, "baseaddr",   paramt_addr, eth_baseaddr);
1311 
  reg_config_param (sec, "dma",        paramt_int,  eth_dma);
1312 
  reg_config_param (sec, "irq",        paramt_int,  eth_irq);
1313 
  reg_config_param (sec, "rtx_type",   paramt_int,  eth_rtx_type);
1314 
  reg_config_param (sec, "rx_channel", paramt_int,  eth_rx_channel);
1315 
  reg_config_param (sec, "tx_channel", paramt_int,  eth_tx_channel);
1316 
  reg_config_param (sec, "rxfile",     paramt_str,  eth_rxfile);
1317 
  reg_config_param (sec, "txfile",     paramt_str,  eth_txfile);
1318 
  reg_config_param (sec, "sockif",     paramt_str,  eth_sockif);
1319 
  reg_config_param (sec, "vapi_id",    paramt_int,  eth_vapi_id);
1320 
 
1321 
}       /* reg_ethernet_sec() */
1322 
 

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