OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [wallclock/] [powerpc/] [mpc5xx/] [v2_0/] [src/] [wallclock_mpc5xx.cxx] - Blame information for rev 174

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//==========================================================================
2
//
3
//      wallclock_mpc5xx.cxx
4
//
5
//      mpc5xx RTC module driver.
6
//
7
//==========================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//==========================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):     Bob Koninckx
44
// Contributors:  Bob Koninckx
45
// Date:          2002-01-18
46
// Purpose:       Wallclock driver for mpc5xx
47
//
48
//####DESCRIPTIONEND####
49
//
50
//==========================================================================
51
 
52
#include <pkgconf/wallclock.h>            // Wallclock device config
53
 
54
#include <cyg/hal/hal_io.h>               // IO macros
55
#include <cyg/infra/cyg_type.h>           // Common type definitions and support
56
 
57
#include <cyg/io/wallclock.hxx>           // The WallClock API
58
#include <cyg/io/wallclock/wallclock.inl> // Helpers
59
 
60
#include <cyg/hal/hal_arch.h>             // RTC register definitions
61
 
62
#include <cyg/infra/diag.h>               // For debugging
63
 
64
//-----------------------------------------------------------------------------
65
// Functions required for the hardware-driver API.
66
 
67
// Returns the number of seconds elapsed since 1970-01-01 00:00:00.
68
cyg_uint32
69
Cyg_WallClock::get_hw_seconds(void)
70
{
71
  cyg_uint32 now;
72
  HAL_READ_UINT32(CYGARC_REG_IMM_RTC, now);
73
 
74
  return now;
75
}
76
 
77
#ifndef CYGSEM_WALLCLOCK_SET_GET_MODE
78
 
79
void
80
Cyg_WallClock::init_hw_seconds(void)
81
{
82
  cyg_uint32 key = 0x55ccaa33;
83
  cyg_uint16 rtcsc;
84
 
85
  // Write zero to the time register
86
  // and start up the RTC
87
  HAL_WRITE_UINT32(CYGARC_REG_IMM_RTCK, key);
88
  HAL_WRITE_UINT32(CYGARC_REG_IMM_RTCSCK, key);
89
 
90
  key = 0;
91
  HAL_WRITE_UINT32(CYGARC_REG_IMM_RTC, key);
92
  HAL_READ_UINT16(CYGARC_REG_IMM_RTCSC, rtcsc);
93
  rtcsc |= 0x0001;
94
  HAL_WRITE_UINT16(CYGARC_REG_IMM_RTCSC, rtcsc);
95
}
96
 
97
#endif // CYGSEM_WALLCLOCK_SET_GET_MODE
98
 
99
//-----------------------------------------------------------------------------
100
// End of wallclock_mpc5xx.cxx

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.