URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [cma230/] [v2_0/] [include/] [pkgconf/] [mlt_arm_cma222_rom.h] - Blame information for rev 657

Go to most recent revision | Details | Compare with Previous | View Log


// eCos memory layout - Fri Oct 20 05:34:42 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0)
#define CYGMEM_REGION_ram_SIZE (0x200000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#define CYGMEM_REGION_rom (0xe000000)
#define CYGMEM_REGION_rom_SIZE (0x40000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x200000 - (size_t) CYG_LABEL_NAME (__heap1))

Line No.	Rev	Author	Line
1	27	unneback	`// eCos memory layout - Fri Oct 20 05:34:42 2000`
2
3			`// This is a generated file - do not edit`
4
5			`#ifndef __ASSEMBLER__`
6			`#include <cyg/infra/cyg_type.h>`
7			`#include <stddef.h>`
8
9			`#endif`
10			`#define CYGMEM_REGION_ram (0)`
11			`#define CYGMEM_REGION_ram_SIZE (0x200000)`
12			`#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R \| CYGMEM_REGION_ATTR_W)`
13			`#define CYGMEM_REGION_rom (0xe000000)`
14			`#define CYGMEM_REGION_rom_SIZE (0x40000)`
15			`#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)`
16			`#ifndef __ASSEMBLER__`
17			`extern char CYG_LABEL_NAME (__heap1) [];`
18			`#endif`
19			`#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))`
20			`#define CYGMEM_SECTION_heap1_SIZE (0x200000 - (size_t) CYG_LABEL_NAME (__heap1))`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [cma230/] [v2_0/] [include/] [pkgconf/] [mlt_arm_cma222_rom.h] - Blame information for rev 657