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#ifndef CYGONCE_HAL_HAL_INTR_H

#define CYGONCE_HAL_HAL_INTR_H

//==========================================================================

//

//      hal_intr.h

//

//      HAL Interrupt and clock support

//

//==========================================================================

//####ECOSGPLCOPYRIGHTBEGIN####

// -------------------------------------------

// This file is part of eCos, the Embedded Configurable Operating System.

// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.

//

// eCos is free software; you can redistribute it and/or modify it under

// the terms of the GNU General Public License as published by the Free

// Software Foundation; either version 2 or (at your option) any later version.

//

// eCos is distributed in the hope that it will be useful, but WITHOUT ANY

// WARRANTY; without even the implied warranty of MERCHANTABILITY or

// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

// for more details.

//

// You should have received a copy of the GNU General Public License along

// with eCos; if not, write to the Free Software Foundation, Inc.,

// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.

//

// As a special exception, if other files instantiate templates or use macros

// or inline functions from this file, or you compile this file and link it

// with other works to produce a work based on this file, this file does not

// by itself cause the resulting work to be covered by the GNU General Public

// License. However the source code for this file must still be made available

// in accordance with section (3) of the GNU General Public License.

//

// This exception does not invalidate any other reasons why a work based on

// this file might be covered by the GNU General Public License.

//

// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.

// at http://sources.redhat.com/ecos/ecos-license/

// -------------------------------------------

//####ECOSGPLCOPYRIGHTEND####

//==========================================================================

//#####DESCRIPTIONBEGIN####

//

// Author(s):    nickg

// Contributors: nickg, jskov,

//               gthomas, jlarmour, msalter

// Date:         1999-02-16

// Purpose:      Define Interrupt support

// Description:  The macros defined here provide the HAL APIs for handling

//               interrupts and the clock.

//              

// Usage:

//              #include <cyg/hal/hal_intr.h>

//              ...

//              

//

//####DESCRIPTIONEND####

//

//==========================================================================

#include <pkgconf/hal.h>

#include <cyg/infra/cyg_type.h>

#include <cyg/hal/hal_io.h>

#include <cyg/hal/var_intr.h>

//--------------------------------------------------------------------------

// MIPS vectors. 

// These are the exception codes presented in the Cause register and

// correspond to VSRs. These values are the ones to use for HAL_VSR_GET/SET

#define CYGNUM_HAL_VECTOR_FIQ      0  // External Fast Interrupt

#define CYGNUM_HAL_VECTOR_IRQ      1  // External Interrupt

#define CYGNUM_HAL_VECTOR_COP      2  // Coprocessor Exception

#define CYGNUM_HAL_VECTOR_DABRT    3  // Data abort

#define CYGNUM_HAL_VECTOR_IABRT    4  // Instruction abort

#define CYGNUM_HAL_VECTOR_PRIV     5  // Privilege violation

#define CYGNUM_HAL_VECTOR_UNIMPL   6  // Unimplemented Insn

#define CYGNUM_HAL_VECTOR_TRACE    7  // Single-step

#define CYGNUM_HAL_VECTOR_SWI      8  // SWI

#define CYGNUM_HAL_VSR_MIN                     0

#define CYGNUM_HAL_VSR_MAX                     8

#define CYGNUM_HAL_VSR_COUNT                   9

// Min/Max exception numbers and how many there are

#define CYGNUM_HAL_EXCEPTION_MIN                0

#define CYGNUM_HAL_EXCEPTION_MAX                CYGNUM_HAL_VSR_MAX

#define CYGNUM_HAL_EXCEPTION_COUNT           \

                 ( CYGNUM_HAL_EXCEPTION_MAX - CYGNUM_HAL_EXCEPTION_MIN + 1 )

#ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED

#define CYGNUM_HAL_FAST_INTERRUPT           0

#define CYGNUM_HAL_INTERRUPT                1

// Min/Max ISR numbers and how many there are

#define CYGNUM_HAL_ISR_MIN                     0

#define CYGNUM_HAL_ISR_MAX                     1

#define CYGNUM_HAL_ISR_COUNT                   2

#define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED

#endif

//--------------------------------------------------------------------------

// Static data used by HAL

// ISR tables

externC volatile CYG_ADDRESS    hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];

externC volatile CYG_ADDRWORD   hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];

externC volatile CYG_ADDRESS    hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];

// VSR table

externC volatile CYG_ADDRESS    hal_vsr_table[CYGNUM_HAL_VSR_MAX+1];

//--------------------------------------------------------------------------

// Default ISR

// The #define is used to test whether this routine exists, and to allow

// us to call it.

externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);

#define HAL_DEFAULT_ISR hal_default_isr

//--------------------------------------------------------------------------

// Interrupt state storage

typedef cyg_uint32 CYG_INTERRUPT_STATE;

//--------------------------------------------------------------------------

// Interrupt control macros

// Beware of nops in this code. They fill delay slots and avoid CP0 hazards

// that might otherwise cause following code to run in the wrong state or

// cause a resource conflict.

#define HAL_DISABLE_INTERRUPTS(_old_)

#define HAL_ENABLE_INTERRUPTS()

#define HAL_RESTORE_INTERRUPTS(_old_)

#define HAL_QUERY_INTERRUPTS( _state_ )

//--------------------------------------------------------------------------

// Routine to execute DSRs using separate interrupt stack

#ifdef  CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK

externC void hal_interrupt_stack_call_pending_DSRs(void);

#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \

    hal_interrupt_stack_call_pending_DSRs()

// these are offered solely for stack usage testing

// if they are not defined, then there is no interrupt stack.

#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base

#define HAL_INTERRUPT_STACK_TOP  cyg_interrupt_stack

// use them to declare these extern however you want:

//       extern char HAL_INTERRUPT_STACK_BASE[];

//       extern char HAL_INTERRUPT_STACK_TOP[];

// is recommended

#endif

//--------------------------------------------------------------------------

// Vector translation.

// For chained interrupts we only have a single vector though which all

// are passed. For unchained interrupts we have a vector per interrupt.

#ifndef HAL_TRANSLATE_VECTOR

#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN)

#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = 0

#else

#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_)

#endif

#endif

//--------------------------------------------------------------------------

// Interrupt and VSR attachment macros

#define HAL_INTERRUPT_IN_USE( _vector_, _state_)                          \

    CYG_MACRO_START                                                       \

    cyg_uint32 _index_;                                                   \

    HAL_TRANSLATE_VECTOR ((_vector_), _index_);                           \

                                                                          \

    if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \

        (_state_) = 0;                                                    \

    else                                                                  \

        (_state_) = 1;                                                    \

    CYG_MACRO_END

#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ )           \

{                                                                           \

    cyg_uint32 _index_;                                                     \

    HAL_TRANSLATE_VECTOR( _vector_, _index_ );                              \

                                                                            \

    if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR )   \

    {                                                                       \

        hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_;               \

        hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_;                 \

        hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_;             \

    }                                                                       \

}

#define HAL_INTERRUPT_DETACH( _vector_, _isr_ )                         \

{                                                                       \

    cyg_uint32 _index_;                                                 \

    HAL_TRANSLATE_VECTOR( _vector_, _index_ );                          \

                                                                        \

    if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ )         \

    {                                                                   \

        hal_interrupt_handlers[_index_] = (CYG_ADDRESS)HAL_DEFAULT_ISR; \

        hal_interrupt_data[_index_] = 0;                                \

        hal_interrupt_objects[_index_] = 0;                             \

    }                                                                   \

}

#define HAL_VSR_GET( _vector_, _pvsr_ )                 \

    *(_pvsr_) = (void (*)())hal_vsr_table[_vector_];

#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START         \

    if( (void*)_poldvsr_ != NULL)                                         \

        *(CYG_ADDRESS *)_poldvsr_ = (CYG_ADDRESS)hal_vsr_table[_vector_]; \

    hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_;                         \

CYG_MACRO_END

// This is an ugly name, but what it means is: grab the VSR back to eCos

// internal handling, or if you like, the default handler.  But if

// cooperating with GDB and CygMon, the default behaviour is to pass most

// exceptions to CygMon.  This macro undoes that so that eCos handles the

// exception.  So use it with care.

externC void __default_exception_vsr(void);

externC void __default_interrupt_vsr(void);

externC void __break_vsr_springboard(void);

#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START  \

    HAL_VSR_SET( _vector_, _vector_ == CYGNUM_HAL_VECTOR_INTERRUPT          \

                              ? (CYG_ADDRESS)__default_interrupt_vsr        \

                              : _vector_ == CYGNUM_HAL_VECTOR_BREAKPOINT    \

                                ? (CYG_ADDRESS)__break_vsr_springboard      \

                                : (CYG_ADDRESS)__default_exception_vsr,     \

                 _poldvsr_ );                                               \

CYG_MACRO_END

//--------------------------------------------------------------------------

// Interrupt controller access

// The default code here simply uses the fields present in the CP0 status

// and cause registers to implement this functionality.

// Beware of nops in this code. They fill delay slots and avoid CP0 hazards

// that might otherwise cause following code to run in the wrong state or

// cause a resource conflict.

#ifndef CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED

#define HAL_INTERRUPT_MASK( _vector_ )

#define HAL_INTERRUPT_UNMASK( _vector_ )

#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ )

#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )

#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )

#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED

#endif

//--------------------------------------------------------------------------

// Clock control.

// This code uses the count and compare registers that are present in many

// MIPS variants.

// Beware of nops in this code. They fill delay slots and avoid CP0 hazards

// that might otherwise cause following code to run in the wrong state or

// cause a resource conflict.

#ifndef CYGHWR_HAL_CLOCK_CONTROL_DEFINED

externC CYG_WORD32 cyg_hal_clock_period;

#define CYGHWR_HAL_CLOCK_PERIOD_DEFINED

#define HAL_CLOCK_INITIALIZE( _period_ )

#define HAL_CLOCK_RESET( _vector_, _period_ )

#define HAL_CLOCK_READ( _pvalue_ )

#define CYGHWR_HAL_CLOCK_CONTROL_DEFINED

#endif

//--------------------------------------------------------------------------

#endif // ifndef CYGONCE_HAL_HAL_INTR_H

// End of hal_intr.h