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#ifndef CYGONCE_HAL_PCMB_INTR_H
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#define CYGONCE_HAL_PCMB_INTR_H
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//==========================================================================
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//
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// pcmb_intr.h
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//
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// i386/pc Interrupt and clock support
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): proven
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// Contributors: proven, jskov, pjo
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// Date: 1999-10-15
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// Purpose: Define Interrupt support
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// Description: The macros defined here provide the HAL APIs for handling
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// interrupts and the clock on a standard PC Motherboard.
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// This file contains info about interrupts and
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// peripherals that are common on all PCs; for example,
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// the clock always activates irq 0 and would therefore
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// be listed here.
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//
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// Usage:
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// #include <cyg/hal/pcmb_intr.h>
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// ...
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/hal_i386.h>
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#include <pkgconf/hal_i386_pcmb.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/plf_intr.h>
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#include <cyg/hal/hal_io.h>
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#include <cyg/hal/hal_smp.h>
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//--------------------------------------------------------------------------
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// Interrupt vectors.
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#define CYGNUM_HAL_INTERRUPT_IRQ0 32
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#define CYGNUM_HAL_INTERRUPT_IRQ1 33
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#define CYGNUM_HAL_INTERRUPT_IRQ2 34
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#define CYGNUM_HAL_INTERRUPT_IRQ3 35
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#define CYGNUM_HAL_INTERRUPT_IRQ4 36
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#define CYGNUM_HAL_INTERRUPT_IRQ5 37
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#define CYGNUM_HAL_INTERRUPT_IRQ6 38
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#define CYGNUM_HAL_INTERRUPT_IRQ7 39
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#define CYGNUM_HAL_INTERRUPT_IRQ8 40
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#define CYGNUM_HAL_INTERRUPT_IRQ9 41
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#define CYGNUM_HAL_INTERRUPT_IRQ10 42
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#define CYGNUM_HAL_INTERRUPT_IRQ11 43
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#define CYGNUM_HAL_INTERRUPT_IRQ12 44
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#define CYGNUM_HAL_INTERRUPT_IRQ13 45
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#define CYGNUM_HAL_INTERRUPT_IRQ14 46
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#define CYGNUM_HAL_INTERRUPT_IRQ15 47
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#define CYGNUM_HAL_INTERRUPT_TIMER 32
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#define CYGNUM_HAL_INTERRUPT_KEYBOARD 33
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#define CYGNUM_HAL_INTERRUPT_SLAVE8259 34
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#define CYGNUM_HAL_INTERRUPT_COM2 35
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#define CYGNUM_HAL_INTERRUPT_COM1 36
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#define CYGNUM_HAL_INTERRUPT_LPT2 37
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#define CYGNUM_HAL_INTERRUPT_FDD 38
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#define CYGNUM_HAL_INTERRUPT_LPT1 39
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#define CYGNUM_HAL_INTERRUPT_WALLCLOCK 40
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#define CYGNUM_HAL_INTERRUPT_SLAVE8259REDIR 41
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#define CYGNUM_HAL_INTERRUPT_COPRO 45
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#define CYGNUM_HAL_INTERRUPT_HDD 46
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#define CYGNUM_HAL_ISR_MIN 32
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#define CYGNUM_HAL_ISR_MAX 255
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#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX - CYGNUM_HAL_ISR_MIN + 1)
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#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER
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#ifdef CYGPKG_HAL_SMP_SUPPORT
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#define CYGNUM_HAL_SMP_CPU_INTERRUPT_VECTOR( _n_ ) (64+(_n_))
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#endif
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//--------------------------------------------------------------------------
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// Interrupt vector translation
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#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \
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((_index_) = ((_vector_)-CYGNUM_HAL_ISR_MIN))
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//--------------------------------------------------------------------------
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// PIC interrupt acknowledge
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#ifndef CYGPKG_HAL_SMP_SUPPORT
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#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
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CYG_MACRO_START \
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int x; \
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HAL_TRANSLATE_VECTOR( _vector_, x ); \
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if ((x >= 8) && (x < 16)) \
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HAL_WRITE_UINT8( 0xa0, 0x20 ); \
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if ((x >= 0) && (x < 16)) \
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HAL_WRITE_UINT8( 0x20, 0x20 ); \
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CYG_MACRO_END
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#else
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#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
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{ \
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HAL_APIC_WRITE( HAL_APIC_EOI, 0 ); \
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}
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#endif
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//--------------------------------------------------------------------------
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// PIC per-interrupt source masking
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#ifndef CYGPKG_HAL_SMP_SUPPORT
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#define HAL_INTERRUPT_MASK( _vector_ ) \
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CYG_MACRO_START \
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int x; \
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HAL_TRANSLATE_VECTOR( _vector_, x ); \
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if (x >= 8) \
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{ \
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x = 1 << (x - 8) ; \
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asm( \
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"inb $0xA1, %%al;" \
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"orl %0, %%eax;" \
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"outb %%al, $0xA1;" \
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: /* No outputs. */ \
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: "g" (x) \
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: "eax" \
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); \
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} \
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else \
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{ \
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x = 1 << x ; \
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asm( \
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"inb $0x21, %%al;" \
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"orl %0, %%eax;" \
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"outb %%al, $0x21;" \
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: /* No outputs. */ \
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: "g" (x) \
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: "eax" \
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); \
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} \
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CYG_MACRO_END
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#define HAL_INTERRUPT_UNMASK( _vector_ ) \
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CYG_MACRO_START \
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int x; \
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HAL_TRANSLATE_VECTOR( _vector_, x ); \
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if (x >= 8) \
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{ \
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x = ~(1 << (x - 8)) ; \
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asm( \
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"inb $0xA1, %%al;" \
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"andl %0, %%eax;" \
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"outb %%al, $0xA1;" \
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: /* No outputs. */ \
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: "g" (x) \
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: "eax" \
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); \
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} \
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else \
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{ \
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x = ~(1 << x) ; \
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asm( \
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"inb $0x21, %%al;" \
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"andl %0, %%eax;" \
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"outb %%al, $0x21;" \
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: /* No outputs. */ \
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: "g" (x) \
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: "eax" \
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); \
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} \
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CYG_MACRO_END
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#else
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#define HAL_INTERRUPT_MASK( _vector_ ) \
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{ \
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cyg_uint32 __vec, __val; \
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HAL_TRANSLATE_VECTOR( _vector_, __vec ); \
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HAL_SPINLOCK_SPIN( cyg_hal_ioapic_lock ); \
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__vec = cyg_hal_isa_bus_irq[__vec]; \
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HAL_IOAPIC_READ( HAL_IOAPIC_REG_REDIR_LO(__vec), __val ); \
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__val |= 0x00010000; \
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HAL_IOAPIC_WRITE( HAL_IOAPIC_REG_REDIR_LO(__vec), __val ); \
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HAL_SPINLOCK_CLEAR( cyg_hal_ioapic_lock ); \
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}
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#define HAL_INTERRUPT_UNMASK( _vector_ ) \
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{ \
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cyg_uint32 __vec, __val; \
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HAL_TRANSLATE_VECTOR( _vector_, __vec ); \
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HAL_SPINLOCK_SPIN( cyg_hal_ioapic_lock ); \
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__vec = cyg_hal_isa_bus_irq[__vec]; \
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HAL_IOAPIC_READ( HAL_IOAPIC_REG_REDIR_LO(__vec), __val ); \
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__val &= ~0x00010000; \
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HAL_IOAPIC_WRITE( HAL_IOAPIC_REG_REDIR_LO(__vec), __val ); \
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HAL_SPINLOCK_CLEAR( cyg_hal_ioapic_lock ); \
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}
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#endif
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//--------------------------------------------------------------------------
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// PIC interrupt configuration
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// Nothing supported here at present
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#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )
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#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )
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#ifdef CYGPKG_HAL_SMP_SUPPORT
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// Additional SMP interrupt configuration support.
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__externC void hal_interrupt_set_cpu( CYG_WORD32 vector, HAL_SMP_CPU_TYPE cpu );
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__externC void hal_interrupt_get_cpu( CYG_WORD32 vector, HAL_SMP_CPU_TYPE *cpu );
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#define HAL_INTERRUPT_SET_CPU( _vector_, _cpu_ ) \
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{ \
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cyg_uint32 __vec, __val; \
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HAL_TRANSLATE_VECTOR( _vector_, __vec ); \
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HAL_SPINLOCK_SPIN( cyg_hal_ioapic_lock ); \
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__vec = cyg_hal_isa_bus_irq[__vec]; \
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HAL_IOAPIC_READ( HAL_IOAPIC_REG_REDIR_HI(__vec), __val ); \
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__val &= 0x00FFFFFF; \
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__val |= (_cpu_)<<24; \
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HAL_IOAPIC_WRITE( HAL_IOAPIC_REG_REDIR_HI(__vec), __val ); \
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HAL_SPINLOCK_CLEAR( cyg_hal_ioapic_lock ); \
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}
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#define HAL_INTERRUPT_GET_CPU( _vector_, _cpu_ ) \
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{ \
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cyg_uint32 __vec, __val; \
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HAL_TRANSLATE_VECTOR( _vector_, __vec ); \
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HAL_SPINLOCK_SPIN( cyg_hal_ioapic_lock ); \
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__vec = cyg_hal_isa_bus_irq[__vec]; \
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HAL_IOAPIC_READ( HAL_IOAPIC_REG_REDIR_HI(__vec), __val ); \
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(_cpu_) = (__val>>24) & 0xFF; \
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HAL_SPINLOCK_CLEAR( cyg_hal_ioapic_lock ); \
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}
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#endif
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//---------------------------------------------------------------------------
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// Clock support.
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externC void hal_pc_clock_initialize(cyg_uint32) ;
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externC void hal_pc_clock_read(cyg_uint32 *) ;
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#define HAL_CLOCK_INITIALIZE(_period_) hal_pc_clock_initialize(_period_)
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#define HAL_CLOCK_RESET(_vec_, _period_) /* Clock automatically reloads. */
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#define HAL_CLOCK_READ(_pvalue_) hal_pc_clock_read(_pvalue_)
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// Timer IO ports
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#define PC_PIT_CONTROL (0x43)
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#define PC_PIT_CLOCK_0 (0x40)
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#define PC_PIT_CLOCK_1 (0x41)
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#define PC_PIT_CLOCK_2 (0x42)
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//---------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_PCMB_INTR_H
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// End of pcmb_intr.h
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