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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mn10300/] [am31/] [v2_0/] [src/] [var_misc.c] - Blame information for rev 174

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//==========================================================================
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//
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//      var_misc.c
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//
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//      HAL CPU variant miscellaneous functions
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    nickg
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// Contributors: nickg, jlarmour
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// Date:         1999-01-21
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// Purpose:      HAL miscellaneous functions
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// Description:  This file contains miscellaneous functions provided by the
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//               HAL.
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>         // Base types
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#include <cyg/infra/cyg_trac.h>         // tracing macros
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#include <cyg/infra/cyg_ass.h>          // assertion macros
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#include <cyg/hal/hal_cache.h>
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/*------------------------------------------------------------------------*/
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/* Variant specific initialization routine.                               */
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void hal_variant_init(void)
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{
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}
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/*------------------------------------------------------------------------*/
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/* Cache functions.                                                       */
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#if !defined(CYG_HAL_MN10300_AM31_SIM)
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void cyg_hal_dcache_store(CYG_ADDRWORD base, int size)
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{
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#if 0    
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    volatile register CYG_BYTE *way0 = HAL_DCACHE_PURGE_WAY0;
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    volatile register CYG_BYTE *way1 = HAL_DCACHE_PURGE_WAY1;
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    register int i;
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    register CYG_ADDRWORD state;
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    HAL_DCACHE_IS_ENABLED(state);
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    if (state)
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        HAL_DCACHE_DISABLE();
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    way0 += base & 0x000007f0;
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    way1 += base & 0x000007f0;
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    for( i = 0; i < size; i += HAL_DCACHE_LINE_SIZE )
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    {
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        *(CYG_ADDRWORD *)way0 = 0;
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        *(CYG_ADDRWORD *)way1 = 0;
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        way0 += HAL_DCACHE_LINE_SIZE;
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        way1 += HAL_DCACHE_LINE_SIZE;
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    }
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    if (state)
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        HAL_DCACHE_ENABLE();
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#else
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    // Despite several people trying to understand it, the above code
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    // still does not work correctly. Whether this is a result of the
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    // AM31 hardware being faulty, or simply a problem with register
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    // pressure causing the values of some variables to be lost as a
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    // result of the purge we are not sure. Similar code on the AM33
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    // works perfectly, but that processor has more registers to play
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    // with.  The following code, taken from CygMon, works correctly,
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    // and does not appear to exhibit the problems of the code above.
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    // It's only drawback is that it purges the entire cache. However,
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    // this is permitted under the definition of the cache macros, so
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    // this is not a major concern at present.
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    __asm__ (
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              ".equ CHCTR,        0x20000070;"
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              ".equ CHCTR_ICEN,   0x0001;"
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              ".equ CHCTR_DCEN,   0x0002;"
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              ".equ CHCTR_ICBUSY, 0x0004;"
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              ".equ CHCTR_DCBUSY, 0x0008;"
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              ".equ CHCTR_ICINV,  0x0010;"
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              ".equ CHCTR_DCINV,  0x0020;"
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              ".equ DCACHE_PURGE_WAY0_START, 0x28400000;"
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              ".equ DCACHE_PURGE_WAY0_END,   0x28400800;"
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              ".equ DCACHE_PURGE_WAY1_START, 0x28401000;"
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              ".equ DCACHE_PURGE_WAY1_END,   0x28401800;"
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              "mov CHCTR,a0;"
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              /* DCACHE */
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              /* first check if dcache enabled */
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              "mov (a0),d0;"
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              "btst CHCTR_DCEN,d0;"
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              /* if not, jump to end */
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              "beq 2f;"
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              /* if so, we have to disable the cache */
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              "and 0xfffffffd,d0;"
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              "mov d0,(a0);"
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              /* wait for it to stop being busy */
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              "setlb;"
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              "nop;"
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              "mov (a0),d0;"
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              "btst CHCTR_DCBUSY,d0;"
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              "lne;"
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              /* now purge the dcache */
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              "mov DCACHE_PURGE_WAY0_START,a1;"
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              "1:"
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              "mov (0,a1),d0;"
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              "add 0x10,a1;"
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              "cmp DCACHE_PURGE_WAY0_END,a1;"
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              "bne 1b;"
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              "mov DCACHE_PURGE_WAY1_START,a1;"
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              "1:"
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              "mov (0,a1),d0;"
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              "add 0x10,a1;"
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              "cmp DCACHE_PURGE_WAY1_END,a1;"
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              "bne 1b;"
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              /* wait for it to stop being busy */
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              "setlb;"
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              "nop;"
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              "mov (a0),d0;"
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              "btst CHCTR_DCBUSY,d0;"
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              "lne;"
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              /* and re-enable */
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              "or CHCTR_DCEN,d0;"
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              "mov d0,(a0);"
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              "2:"
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              :
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              :
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              : "a0", "a1", "d0"
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        );
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#endif    
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}
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#endif
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/*------------------------------------------------------------------------*/
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/* End of var_misc.c                                                      */

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