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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sh/] [dreamcast/] [v2_0/] [src/] [dreamcast_pci.c] - Blame information for rev 229

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//=============================================================================
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//
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//      dreamcast_pci.c
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//
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//      Dreamcast PCI code 
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   t@keshi.org
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// Contributors:t@keshi.org
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// Date:        2001-07-30
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// Purpose:     Dreamcast PCI code
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//              
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/system.h>
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#include CYGBLD_HAL_PLATFORM_H
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#include CYGHWR_MEMORY_LAYOUT_H
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#include <cyg/infra/cyg_type.h>         // base types
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#include <cyg/infra/cyg_trac.h>         // tracing macros
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#include <cyg/infra/cyg_ass.h>          // assertion macros
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#include <cyg/hal/hal_io.h>             // IO macros
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#include <cyg/hal/hal_if.h>             // calling interface API
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#include <cyg/hal/hal_arch.h>           // Register state info
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#include <cyg/hal/hal_diag.h>
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#include <cyg/hal/hal_intr.h>           // Interrupt names
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#include <cyg/hal/hal_cache.h>
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#include <cyg/io/pci_hw.h>
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#include <cyg/io/pci.h>
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#define GAPSPCI_REGS            0xa1001400
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#define GAPSPCI_DMA_BASE        0x01840000
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#define GAPSPCI_DMA_SIZE        32768
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#define GAPSPCI_BBA_CONFIG      0xa1001600
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#define GAPSPCI_INTC            0xa05f6924
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static cyg_bool gapspci_initialized;
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void cyg_hal_plf_pci_init(void)
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{
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        int i;
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        cyg_uint32 val;
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#if 0
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        char idbuf[16];
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        for(i=0; i<16; i++)
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                HAL_READ_UINT8(GAPSPCI_REGS+i, idbuf[i]);
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        if(strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16))
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                return;
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#endif
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        gapspci_initialized = false;
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        HAL_WRITE_UINT32(GAPSPCI_REGS+0x18, 0x5a14a501);
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        for(i=0; i<1000000; i++);
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        HAL_READ_UINT32(GAPSPCI_REGS+0x18, val);
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        if (val != 1) return;
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        HAL_WRITE_UINT32(GAPSPCI_REGS+0x20, 0x01000000);
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        HAL_WRITE_UINT32(GAPSPCI_REGS+0x24, 0x01000000);
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        HAL_WRITE_UINT32(GAPSPCI_REGS+0x28, GAPSPCI_DMA_BASE);
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        HAL_WRITE_UINT32(GAPSPCI_REGS+0x2c, GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE);
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        HAL_WRITE_UINT32(GAPSPCI_REGS+0x14, 1);
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        HAL_WRITE_UINT32(GAPSPCI_REGS+0x34, 1);
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#if 1
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        /* Setting up Broadband Adapter */
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        HAL_WRITE_UINT16(GAPSPCI_BBA_CONFIG+0x06, 0xf900);
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        HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+0x30, 0x00000000);
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        HAL_WRITE_UINT8 (GAPSPCI_BBA_CONFIG+0x3c, 0x00);
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        HAL_WRITE_UINT8 (GAPSPCI_BBA_CONFIG+0x0d, 0xf0);
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        HAL_WRITE_UINT16(GAPSPCI_BBA_CONFIG+0x04, 0x0006);
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        HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+0x10, 0x00002001);
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        HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+0x14, 0x01000000);
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#endif
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        /* Enable interrupt */
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        HAL_READ_UINT32(GAPSPCI_INTC, val);
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        val |= (1<<3);
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        HAL_WRITE_UINT32(GAPSPCI_INTC, val);
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        gapspci_initialized = true;
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}
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#define BBA_SELECTED(bus, devfn) (bus==0 && devfn==0)
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cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus,
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                                           cyg_uint32 devfn,
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                                           cyg_uint32 offset)
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{
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        cyg_uint32 val;
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        if (!gapspci_initialized || !BBA_SELECTED(bus, devfn))
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                return 0xffffffff;
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        HAL_READ_UINT32(GAPSPCI_BBA_CONFIG+offset, val);
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        return val;
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}
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cyg_uint16 cyg_hal_plf_pci_cfg_read_word  (cyg_uint32 bus,
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                                           cyg_uint32 devfn,
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                                           cyg_uint32 offset)
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{
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        cyg_uint16 val;
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        if (!gapspci_initialized || !BBA_SELECTED(bus, devfn))
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                return 0xffff;
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        HAL_READ_UINT16(GAPSPCI_BBA_CONFIG+offset, val);
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        return val;
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}
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cyg_uint8 cyg_hal_plf_pci_cfg_read_byte   (cyg_uint32 bus,
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                                           cyg_uint32 devfn,
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                                           cyg_uint32 offset)
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{
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        cyg_uint8 val;
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        if (!gapspci_initialized || !BBA_SELECTED(bus, devfn))
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                return 0xff;
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        HAL_READ_UINT8(GAPSPCI_BBA_CONFIG+offset, val);
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        return val;
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}
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void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus,
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                                      cyg_uint32 devfn,
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                                      cyg_uint32 offset,
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                                      cyg_uint32 val)
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{
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        if (gapspci_initialized && BBA_SELECTED(bus, devfn))
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                HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+offset, val);
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}
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void cyg_hal_plf_pci_cfg_write_word  (cyg_uint32 bus,
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                                      cyg_uint32 devfn,
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                                      cyg_uint32 offset,
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                                      cyg_uint16 val)
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{
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        if (gapspci_initialized && BBA_SELECTED(bus, devfn))
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                HAL_WRITE_UINT16(GAPSPCI_BBA_CONFIG+offset, val);
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}
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void cyg_hal_plf_pci_cfg_write_byte   (cyg_uint32 bus,
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                                       cyg_uint32 devfn,
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                                       cyg_uint32 offset,
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                                       cyg_uint8 val)
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{
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        if (gapspci_initialized && BBA_SELECTED(bus, devfn))
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                HAL_WRITE_UINT8(GAPSPCI_BBA_CONFIG+offset, val);
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}
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//-----------------------------------------------------------------------------
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// End of dreamcast_pci.c

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