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#ifndef CYGONCE_MCF5272_SERIAL_H
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#define CYGONCE_MCF5272_SERIAL_H
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//==========================================================================
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//
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// devs/serial/coldfire/mcf5272/mcf5272_serial.h
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//
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// ColdFire MCF5272 serial I/O module definitions.
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2006 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Enrico Piria, Wade Jensen
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// Contributors:
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// Date: 2005-06-25
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// Purpose: MCF5272 serial I/O module definitions.
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// Description:
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//
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//####DESCRIPTIONEND####
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//==========================================================================
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#include <pkgconf/io_serial_coldfire_mcf5272.h>
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// Bit level definitions and macros
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#define MCF5272_UART_UMR1_RXRTS (0x80)
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#define MCF5272_UART_UMR1_RXIRQ (0x40)
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#define MCF5272_UART_UMR1_ERR (0x20)
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#define MCF5272_UART_UMR1_PM_MULTI_ADDR (0x1C)
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#define MCF5272_UART_UMR1_PM_MULTI_DATA (0x18)
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#define MCF5272_UART_UMR1_PM_NONE (0x10)
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#define MCF5272_UART_UMR1_PM_FORCE_HI (0x0C)
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#define MCF5272_UART_UMR1_PM_FORCE_LO (0x08)
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#define MCF5272_UART_UMR1_PM_ODD (0x04)
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#define MCF5272_UART_UMR1_PM_EVEN (0x00)
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#define MCF5272_UART_UMR1_BC_5 (0x00)
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#define MCF5272_UART_UMR1_BC_6 (0x01)
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#define MCF5272_UART_UMR1_BC_7 (0x02)
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#define MCF5272_UART_UMR1_BC_8 (0x03)
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#define MCF5272_UART_UMR2_CM_NORMAL (0x00)
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#define MCF5272_UART_UMR2_CM_ECHO (0x40)
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#define MCF5272_UART_UMR2_CM_LOCAL_LOOP (0x80)
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#define MCF5272_UART_UMR2_CM_REMOTE_LOO (0xC0)
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#define MCF5272_UART_UMR2_TXRTS (0x20)
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#define MCF5272_UART_UMR2_TXCTS (0x10)
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#define MCF5272_UART_UMR2_STOP_BITS_1 (0x07)
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#define MCF5272_UART_UMR2_STOP_BITS_15 (0x08)
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#define MCF5272_UART_UMR2_STOP_BITS_2 (0x0F)
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// Stop Bit Length
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#define MCF5272_UART_UMR2_STOP_BITS(a) ((a)&0x0f)
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#define MCF5272_UART_USR_RB (0x80)
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#define MCF5272_UART_USR_FE (0x40)
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#define MCF5272_UART_USR_PE (0x20)
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#define MCF5272_UART_USR_OE (0x10)
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#define MCF5272_UART_USR_TXEMP (0x08)
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#define MCF5272_UART_USR_TXRDY (0x04)
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#define MCF5272_UART_USR_FFULL (0x02)
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#define MCF5272_UART_USR_RXRDY (0x01)
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// Rx Clk Select
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#define MCF5272_UART_UCSR_RCS(a) (((a) & 0x0f) << 4)
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// Tx Clk Select
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#define MCF5272_UART_UCSR_TCS(a) ((a) & 0x0f)
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#define MCF5272_UART_UCR_NONE (0x00)
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#define MCF5272_UART_UCR_ENAB (0x80)
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#define MCF5272_UART_UCR_STOP_BREAK (0x70)
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#define MCF5272_UART_UCR_START_BREAK (0x60)
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#define MCF5272_UART_UCR_RESET_BKCHGINT (0x50)
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#define MCF5272_UART_UCR_RESET_ERROR (0x40)
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#define MCF5272_UART_UCR_RESET_TX (0x30)
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#define MCF5272_UART_UCR_RESET_RX (0x20)
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#define MCF5272_UART_UCR_RESET_MR (0x10)
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#define MCF5272_UART_UCR_TX_DISABLED (0x08)
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#define MCF5272_UART_UCR_TX_ENABLED (0x04)
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#define MCF5272_UART_UCR_RX_DISABLED (0x02)
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#define MCF5272_UART_UCR_RX_ENABLED (0x01)
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#define MCF5272_UART_UCR_TXRXEN \
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(MCF5272_UART_UCR_TX_ENABLED | MCF5272_UART_UCR_RX_ENABLED)
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#define MCF5272_UART_UCCR_COS (0x10)
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#define MCF5272_UART_UCCR_CTS (0x01)
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#define MCF5272_UART_UACR_BRG (0x80)
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#define MCF5272_UART_UACR_CTMS_TIMER (0x60)
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#define MCF5272_UART_UACR_IEC (0x01)
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#define MCF5272_UART_UISR_COS (0x80)
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#define MCF5272_UART_UISR_ABC (0x40)
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#define MCF5272_UART_UISR_DB (0x04)
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#define MCF5272_UART_UISR_RXRDY (0x02)
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#define MCF5272_UART_UISR_TXRDY (0x01)
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#define MCF5272_UART_UIMR_COS (0x80)
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#define MCF5272_UART_UIMR_ABC (0x40)
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#define MCF5272_UART_UIMR_DB (0x04)
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#define MCF5272_UART_UIMR_FFULL_RXRDY (0x02)
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#define MCF5272_UART_UIMR_TXRDY (0x01)
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#define MCF5272_UART_UOP0_RTS (0x01)
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#define MCF5272_UART_UOP1_RTS (0x01)
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// ---------------------------------------------------------------------------
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// End of mcf5272_serial.h
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#endif // CYGONCE_MCF5272_SERIAL_H
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