OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [frv/] [arch/] [current/] [src/] [hal_misc.c] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
/*==========================================================================
2
//
3
//      hal_misc.c
4
//
5
//      HAL miscellaneous functions
6
//
7
//==========================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later
16
// version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
//
27
// As a special exception, if other files instantiate templates or use
28
// macros or inline functions from this file, or you compile this file
29
// and link it with other works to produce a work based on this file,
30
// this file does not by itself cause the resulting work to be covered by
31
// the GNU General Public License. However the source code for this file
32
// must still be made available in accordance with section (3) of the GNU
33
// General Public License v2.
34
//
35
// This exception does not invalidate any other reasons why a work based
36
// on this file might be covered by the GNU General Public License.
37
// -------------------------------------------
38
// ####ECOSGPLCOPYRIGHTEND####
39
//==========================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):    nickg, gthomas
43
// Contributors: nickg, gthomas
44
// Date:         1999-02-20
45
// Purpose:      HAL miscellaneous functions
46
// Description:  This file contains miscellaneous functions provided by the
47
//               HAL.
48
//
49
//####DESCRIPTIONEND####
50
//
51
//=========================================================================*/
52
 
53
#include <pkgconf/hal.h>
54
#include <pkgconf/hal_frv.h>
55
#ifdef CYGPKG_KERNEL
56
#include <pkgconf/kernel.h>
57
#endif
58
#ifdef CYGPKG_CYGMON
59
#include <pkgconf/cygmon.h>
60
#endif
61
 
62
#include <cyg/infra/cyg_type.h>
63
#include <cyg/infra/cyg_trac.h>         // tracing macros
64
#include <cyg/infra/cyg_ass.h>          // assertion macros
65
#include <cyg/infra/diag.h>
66
 
67
#include <cyg/hal/hal_arch.h>           // HAL header
68
#include <cyg/hal/hal_intr.h>           // HAL header
69
#include <cyg/hal/hal_cache.h>          // HAL header
70
 
71
/*------------------------------------------------------------------------*/
72
/* First level C exception handler.                                       */
73
 
74
externC void __handle_exception (void);
75
 
76
externC HAL_SavedRegisters *_hal_registers;
77
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
78
// Historical - this datum is defined by the GDB stubs if present
79
externC
80
#endif
81
        void* volatile __mem_fault_handler;
82
 
83
#if 0
84
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
85
/* Force exception handling into the GDB stubs.  This is done by taking over
86
   the exception vectors while executing in the stubs.  This allows for the
87
   debugged program to handle exceptions itself, except while the GDB
88
   processing is underway.  The only vector that can't be handled this way
89
   is the illegal instruction vector which is used for breakpoint/single-step
90
   and must be maintained by the stubs at all times.
91
   Note: the interrupt vectors are _not_ preempted as the stubs probably can't
92
   handle them properly.
93
*/
94
 
95
#define ARM_VECTORS 8
96
extern unsigned long vectors[];  // exception vectors as defined by the stubs
97
 
98
#if !defined(CYGPKG_CYGMON)
99
static unsigned long *hardware_vectors = (unsigned long *)0x20;
100
static unsigned long hold_vectors[ARM_VECTORS];
101
static int exception_level;
102
 
103
static void
104
__take_over_debug_traps(void)
105
{
106
    hold_vectors[CYGNUM_HAL_VECTOR_ABORT_PREFETCH] = hardware_vectors[CYGNUM_HAL_VECTOR_ABORT_PREFETCH];
107
    hardware_vectors[CYGNUM_HAL_VECTOR_ABORT_PREFETCH] = vectors[CYGNUM_HAL_VECTOR_ABORT_PREFETCH];
108
    hold_vectors[CYGNUM_HAL_VECTOR_ABORT_DATA] = hardware_vectors[CYGNUM_HAL_VECTOR_ABORT_DATA];
109
    hardware_vectors[CYGNUM_HAL_VECTOR_ABORT_DATA] = vectors[CYGNUM_HAL_VECTOR_ABORT_DATA];
110
}
111
 
112
static void
113
__restore_debug_traps(void)
114
{
115
    hardware_vectors[CYGNUM_HAL_VECTOR_ABORT_PREFETCH] = hold_vectors[CYGNUM_HAL_VECTOR_ABORT_PREFETCH];
116
    hardware_vectors[CYGNUM_HAL_VECTOR_ABORT_DATA] = hold_vectors[CYGNUM_HAL_VECTOR_ABORT_DATA];
117
}
118
#endif // !CYGPKG_CYGMON
119
#endif
120
 
121
#endif // if 0
122
 
123
void
124
exception_handler(HAL_SavedRegisters *regs)
125
{
126
    // Special case handler for code which has chosen to take care
127
    // of data exceptions (i.e. code which expects them to happen)
128
    // This is common in discovery code, e.g. checking for a particular
129
    // device which may generate an exception when probing if the
130
    // device is not present
131
    if (__mem_fault_handler &&
132
        regs->vector == CYGNUM_HAL_EXCEPTION_DATA_ACCESS) {
133
        regs->pc = (unsigned long)__mem_fault_handler;
134
        return; // Caught an exception inside stubs        
135
    }
136
 
137
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && !defined(CYGPKG_CYGMON)
138
//??    if (++exception_level == 1) __take_over_debug_traps();
139
 
140
    _hal_registers = regs;
141
    __handle_exception();
142
 
143
//??    if (--exception_level == 0) __restore_debug_traps();
144
 
145
#elif defined(CYGPKG_KERNEL_EXCEPTIONS)
146
 
147
    // We should decode the vector and pass a more appropriate
148
    // value as the second argument. For now we simply pass a
149
    // pointer to the saved registers. We should also divert
150
    // breakpoint and other debug vectors into the debug stubs.
151
 
152
    cyg_hal_deliver_exception( regs->vector, (CYG_ADDRWORD)regs );
153
 
154
#else
155
 
156
    CYG_FAIL("Exception!!!");
157
 
158
#endif    
159
 
160
    return;
161
}
162
 
163
void hal_spurious_IRQ(HAL_SavedRegisters *regs) CYGBLD_ATTRIB_WEAK;
164
void
165
hal_spurious_IRQ(HAL_SavedRegisters *regs)
166
{
167
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
168
    exception_handler(regs);
169
#else
170
    CYG_FAIL("Spurious interrupt!!");
171
#endif    
172
}
173
 
174
/*------------------------------------------------------------------------*/
175
/* C++ support - run initial constructors                                 */
176
 
177
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
178
cyg_bool cyg_hal_stop_constructors;
179
#endif
180
 
181
typedef void (*pfunc) (void);
182
extern pfunc __CTOR_LIST__[];
183
extern pfunc __CTOR_END__[];
184
 
185
void
186
cyg_hal_invoke_constructors (void)
187
{
188
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
189
    static pfunc *p = &__CTOR_END__[-1];
190
 
191
    cyg_hal_stop_constructors = 0;
192
    for (; p >= __CTOR_LIST__; p--) {
193
        (*p) ();
194
        if (cyg_hal_stop_constructors) {
195
            p--;
196
            break;
197
        }
198
    }
199
#else
200
    pfunc *p;
201
 
202
    for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) {
203
        (*p) ();
204
    }
205
#endif
206
}
207
 
208
/*------------------------------------------------------------------------*/
209
/* Architecture default ISR                                               */
210
 
211
externC cyg_uint32
212
hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
213
{
214
    CYG_TRACE1(true, "Interrupt: %d", vector);
215
 
216
    CYG_FAIL("Spurious Interrupt!!!");
217
    return 0;
218
}
219
 
220
/*------------------------------------------------------------------------*/
221
/* Idle thread action                                                     */
222
 
223
void
224
hal_idle_thread_action( cyg_uint32 count )
225
{
226
}
227
 
228
/*-------------------------------------------------------------------------*/
229
/* Misc functions                                                          */
230
 
231
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS__
232
/* This function will generate a breakpoint exception.  It is used at the
233
   beginning of a program to sync up with a debugger and can be used
234
   otherwise as a quick means to stop program execution and "break" into
235
   the debugger. */
236
 
237
void
238
breakpoint(void)
239
{
240
    HAL_BREAKPOINT(_breakinst);
241
}
242
 
243
 
244
/* This function returns the opcode for a 'trap' instruction.  */
245
 
246
unsigned long
247
__break_opcode (void)
248
{
249
    return HAL_BREAKINST;
250
}
251
#endif
252
 
253
int
254
hal_lsbindex(int mask)
255
{
256
    int i;
257
    for (i = 0;  i < 32;  i++) {
258
      if (mask & (1<<i)) return (i);
259
    }
260
    return (-1);
261
}
262
 
263
int
264
hal_msbindex(int mask)
265
{
266
    int i;
267
    for (i = 31;  i >= 0;  i--) {
268
      if (mask & (1<<i)) return (i);
269
    }
270
    return (-1);
271
}
272
 
273
/*------------------------------------------------------------------------*/
274
// EOF hal_misc.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.