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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [openrisc/] [arch/] [current/] [include/] [arch.inc] - Blame information for rev 838

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1 786 skrzyp
##=============================================================================
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##
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##      arch.inc
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##
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##      OpenRISC assembler header file
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##
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##=============================================================================
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## ####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later
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## version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with eCos; if not, write to the Free Software Foundation, Inc.,
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## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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##
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## As a special exception, if other files instantiate templates or use
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## macros or inline functions from this file, or you compile this file
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## and link it with other works to produce a work based on this file,
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## this file does not by itself cause the resulting work to be covered by
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## the GNU General Public License. However the source code for this file
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## must still be made available in accordance with section (3) of the GNU
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## General Public License v2.
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##
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## This exception does not invalidate any other reasons why a work based
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## on this file might be covered by the GNU General Public License.
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## -------------------------------------------
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## ####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s):   sfurman
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## Contributors:
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## Date:        2003-01-15
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## Purpose:     Architecture definitions.
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## Description: This file contains various definitions and macros that are
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##              useful for writing assembly code for the OpenRISC CPU family.
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## Usage:
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##              #include 
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##              ...
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##
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##
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######DESCRIPTIONEND####
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##
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##=============================================================================
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#ifndef CYGONCE_HAL_ARCH_INC
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#define CYGONCE_HAL_ARCH_INC
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# Declare given label name as the start of a function accessible from C code
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#define FUNC_START(name)        \
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        .type name,@function;   \
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        .globl name;            \
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name:
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#define FUNC_END(name)
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# Make aliases for ABI distinguished registers
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#define sp r1
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#define fp r2
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#define lr r9
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#define rv r11
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# Size of GPR regs - 4 bytes for or32
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#define OR1K_GPRSIZE    4
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# Size of all other registers
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#define OR1K_REGSIZE    4
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# Utility macro: Load a 32-bit constant into a register
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        .macro  load32i reg const
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        l.movhi \reg,hi(\const)
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        l.ori   \reg,\reg,lo(\const)
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        .endm
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##-----------------------------------------------------------------------------
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## OpenRISC thread and interrupt saved state structure. These offsets
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## must match the layout of the HAL_SavedRegisters struct in
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## hal_arch.h. Do not change this without changing the layout there,
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## or viceversa.
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#define OR1KREGS_GPRS   0
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#define OR1KREG_MACHI   (OR1KREGS_GPRS + OR1K_GPRSIZE * 32)
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#define OR1KREG_MACLO   (OR1KREG_MACHI + OR1K_REGSIZE)
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#define OR1KREG_VECTOR  (OR1KREG_MACLO + OR1K_REGSIZE)
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#define OR1KREG_SR      (OR1KREG_VECTOR+ OR1K_REGSIZE)
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#define OR1KREG_PC      (OR1KREG_SR    + OR1K_REGSIZE)
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#define OR1KREG_EEAR    (OR1KREG_PC    + OR1K_REGSIZE)
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#define SIZEOF_OR1KREGS (OR1KREG_EEAR  + OR1K_REGSIZE)
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#include 
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#endif // #ifndef CYGONCE_HAL_ARCH_INC
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// EOF arch.inc

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