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//=============================================================================
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//
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// hal_aux.c
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//
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// HAL auxiliary objects and code; per platform
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): pfine
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// Contributors:hmt
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// Date: 2002-02-27
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// Purpose: HAL aux objects: startup tables.
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// Description: Tables for per-platform initialization
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <cyg/hal/hal_mem.h> // HAL memory definitions
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/hal_if.h> // hal_if_init
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#include <cyg/hal/hal_io.h> // hal_if_init
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#include <cyg/hal/hal_misc.h> // cyg_hal_is_break
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#include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
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#include <cyg/hal/hal_diag.h>
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#include <cyg/hal/ppc_regs.h>
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#include <cyg/hal/hal_intr.h>
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#include <cyg/hal/mpc8260.h> // Needed for IMMR structure
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#ifdef CYG_HAL_STARTUP_ROM
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#ifdef CYGPKG_REDBOOT
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#include <pkgconf/redboot.h>
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#include <redboot.h>
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// Exported CLI function
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RedBoot_cmd("sdram_test",
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"test the sdram",
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"",
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do_sdram_test
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);
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void
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do_sdram_test(int argc, char *argv[])
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{
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unsigned long oldints;
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diag_printf("Starting test for SDRAM.\n");
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diag_printf("D18 will indicate PASS/FAIL (Green/Red).\n");
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diag_printf("Resetting board will be necessary after test completion.\n");
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HAL_DISABLE_INTERRUPTS(oldints);
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memory_test();
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}
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#endif
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#endif
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// For Baud Rate Calculation, see MPC8260 PowerQUICC II User's Manual
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// 16.3 UART Baud Rate Examples, page 16-5.
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#define UART_BIT_RATE(n) \
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(((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000))/(n * 64))
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#define UART_BAUD_RATE CYGNUM_HAL_TS6_DIAG_BAUD
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// The memory map is weakly defined, allowing the application to redefine
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// it if necessary. The regions defined below are the minimum requirements.
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CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
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// Mapping for the Motorola MPC8260 development board
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CYGARC_MEMDESC_CACHE( 0x00000000, 0x04000000 ), // Main memory 60x SDRAM
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// Mapping for the FPGA and the MPC8260 Internal memory
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CYGARC_MEMDESC_NOCACHE( 0x04500000, 0x00400000 ),
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// Mapping for the Cluster Bus
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CYGARC_MEMDESC_NOCACHE( 0xE0000000, 0x10000000 ),
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// Mapping for the FLASH
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CYGARC_MEMDESC_NOCACHE( 0xff800000, 0x00800000 ), // ROM region
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CYGARC_MEMDESC_TABLE_END
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};
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/***********************/
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/* Global Declarations */
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/***********************/
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//#define USE_SMC1
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volatile t_PQ2IMM *IMM; /* IMM base pointer */
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//--------------------------------------------------------------------------
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// Platform init code.
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void
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hal_platform_init(void)
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{
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// Ports and Pins assigned for General Purpose I/O
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// PORT PIN(s) DIR (I/O) Name Init Value Comment
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//-------------------------------------------------------------------
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// A 30-31 TBD TBD Wires to RF Board
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// A 29 O TS_RESET_L 0 Tiger Sharc Reset
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// A 28 O LP_ENB_L 1 Link Port Buffer Enable
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// A 26-27 TBD TBD Wires to RF Board
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// A 18-23 TBD TBD Wires to each Tiger Sharc
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// A 12-17 O xxxxxxxxxx 0 Tiger Sharc Interrupt
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// B 4-7 O xxxxxxxxxx TBD User controlled LEDs
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// C 8 I xxxxxxxxxx xxx RF Board Interrupt
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// C 6 I xxxxxxxxxx xxx FPGA Interrupt
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// C 0-5 I xxxxxxxxxx xxx TSn Interrupt
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// D 20 ? PPC_WAIT TBD Open Drain == High Z
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// D 7-9 O CIMP 0-2 110 TS Impedance ctrl
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// D 4-6 O DS 0-2 100 TS Drive Strength
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// Ports and Pins assigned for Dedicated Pin Assignment
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// PORT PIN(s) DIR (I/O) Name Init Value Comment
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//-------------------------------------------------------------------
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// D 16-19 x TBD SPI to RF Board
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// D 14-15 x TBD I2C
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#define TS6_PPARA_INIT_MASK 0xFFF00000
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#define TS6_PDIRA_INIT_MASK 0x3003F000
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#define TS6_PDATA_INIT_MASK 0x1003F000
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IMM = (t_PQ2IMM *)0x04700000; /* MPC8260 internal register map */
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/*-------------------------------------------*/
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/* Program the Port Pin Registers */
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/*-------------------------------------------*/
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IMM->io_regs[PORT_A].ppar &= 0xFFF00000; /* Clear bits for GPIO */
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IMM->io_regs[PORT_A].pdir |= 0x000FC00C; /* Set bits on outputs */
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IMM->io_regs[PORT_A].pdat |= 0x00000008; /* Set high outputs bits */
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IMM->io_regs[PORT_A].pdat &= 0xFFF03FFB; /* Clear low output bits */
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// Initialize Port B Pins 4,5,6,7 general purpose IO
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// Pin == 0 ==> LED on
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// Pin 4 LED 18, Red
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// Pin 5 LED 18, Green
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// Pin 6 LED 17, Red
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// Pin 7 LED 17, Green
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IMM->io_regs[PORT_B].ppar &= 0xF0FFFFFF; /* Clear 4-7 */
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IMM->io_regs[PORT_B].pdir |= 0x0F000000; /* Set 4-7 as outputs */
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IMM->io_regs[PORT_B].pdat |= 0x0F000000; /* Clear LED's */
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IMM->io_regs[PORT_B].pdat &= 0xFDFFFFFF; /* Set LED's 17 to green */
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IMM->io_regs[PORT_C].ppar &= 0x007FFFFF; /* Clear 0 -8 */
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IMM->io_regs[PORT_C].pdir &= 0x007FFFFF; /* Configure as inputs */
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//IMM->io_regs[PORT_C].podr &= 0xFF800000; /* Configure as inputs */
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IMM->io_regs[PORT_D].ppar &= 0xF03FF7FF;
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IMM->io_regs[PORT_D].pdir |= 0x0FC00000;
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IMM->io_regs[PORT_D].podr |= 0x00000800;
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IMM->io_regs[PORT_D].pdat |= 0x09800000;
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#ifdef USE_CPM_SPI_CONTROLLER
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// Dedicated Pin assignments for SPI
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IMM->io_regs[PORT_D].ppar |= 0x0000F000;
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IMM->io_regs[PORT_D].podr &= 0xFFFF0FFF;
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IMM->io_regs[PORT_D].pdir |= 0x0000F000;
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#else
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// The ts6 board does not use the SPI controller provided by the CPM,
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// instead it is left up to the application to control the SPI.
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// Therefore, initialize the SPI specific pins as General Purpose I/O
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// and Bi-directional.
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IMM->io_regs[PORT_D].ppar &= 0xFFFF0FFF; /* General Purpose I/O */
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IMM->io_regs[PORT_D].pdir &= 0xFFFF0FFF; /* input or Bi-directional */
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#endif
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#ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
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hal_if_init();
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#endif
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}
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// EOF hal_aux.c
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