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[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [testbench/] [cfg.S] - Blame information for rev 224

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Line No. Rev Author Line
1 224 markom 
/* Configuration tester */
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#include "spr_defs.h"
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.org 0x100
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_reset:
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        l.addi  r1,r0,0x7f00
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        l.jal   _main
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        l.nop
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_main:
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        l.addi  r2,r0,0
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        l.mfspr r3,r0,SPR_VR            /* Version */
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r3,r0,SPR_UPR           /* Unit Present */
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r4,r0,SPR_PMR           /* Power Management */
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        l.addi  r3,r0,0
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        l.mtspr r0,r3,SPR_PMR
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        l.mfspr r3,r0,SPR_PMR
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        l.andi  r3,r3,0xff
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.addi  r3,r0,5
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        l.mtspr r0,r3,SPR_PMR
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        l.mfspr r3,r0,SPR_PMR
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        l.andi  r3,r3,0xff
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mtspr r0,r4,SPR_PMR
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        l.mfspr r3,r0,SPR_CPUCFGR
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r3,r0,SPR_DMMUCFGR
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r3,r0,SPR_IMMUCFGR
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r3,r0,SPR_DCCFGR
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r3,r0,SPR_ICCFGR
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r3,r0,SPR_DCFGR
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.mfspr r3,r0,SPR_PCCFGR
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        l.mtspr r0,r3,0x1234
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        l.add   r2,r2,r3
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        l.movhi r3,hi(0xdeacf5cc)
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        l.ori   r3,r3,lo(0xdeacf5cc)
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        l.add   r2,r2,r3
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        l.mtspr r0,r2,0x1234
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        l.addi  r3,r0,0
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        l.sys   203

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