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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [arch/] [arm/] [lib/] [csumpartialcopygeneric.S] - Blame information for rev 1765

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Line No. Rev Author Line
1 1275 phoenix
/*
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 *  linux/arch/arm/lib/csumpartialcopygeneric.S
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 *
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 *  Copyright (C) 1995-2001 Russell King
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 */
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/*
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 * unsigned int
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 * csum_partial_copy_xxx(const char *src, char *dst, int len, int sum, )
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 *  r0 = src, r1 = dst, r2 = len, r3 = sum
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 *  Returns : r0 = checksum
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 *
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 * Note that 'tst' and 'teq' preserve the carry flag.
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 */
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src     .req    r0
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dst     .req    r1
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len     .req    r2
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sum     .req    r3
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.zero:          mov     r0, sum
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                load_regs       ea
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                /*
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                 * Align an unaligned destination pointer.  We know that
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                 * we have >= 8 bytes here, so we don't need to check
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                 * the length.  Note that the source pointer hasn't been
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                 * aligned yet.
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                 */
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.dst_unaligned: tst     dst, #1
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                beq     .dst_16bit
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                load1b  ip
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                sub     len, len, #1
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                adcs    sum, sum, ip, lsl #8    @ update checksum
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                strb    ip, [dst], #1
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                tst     dst, #2
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                moveq   pc, lr                  @ dst is now 32bit aligned
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.dst_16bit:     load2b  r8, ip
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                sub     len, len, #2
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                adcs    sum, sum, r8
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                strb    r8, [dst], #1
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                adcs    sum, sum, ip, lsl #8
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                strb    ip, [dst], #1
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                mov     pc, lr                  @ dst is now 32bit aligned
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                /*
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                 * Handle 0 to 7 bytes, with any alignment of source and
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                 * destination pointers.  Note that when we get here, C = 0
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                 */
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.less8:         teq     len, #0                 @ check for zero count
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                beq     .zero
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                /* we must have at least one byte. */
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                tst     dst, #1                 @ dst 16-bit aligned
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                beq     .less8_aligned
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                /* Align dst */
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                load1b  ip
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                sub     len, len, #1
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                adcs    sum, sum, ip, lsl #8    @ update checksum
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                strb    ip, [dst], #1
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                tst     len, #6
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                beq     .less8_byteonly
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1:              load2b  r8, ip
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                sub     len, len, #2
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                adcs    sum, sum, r8
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                strb    r8, [dst], #1
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                adcs    sum, sum, ip, lsl #8
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                strb    ip, [dst], #1
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.less8_aligned: tst     len, #6
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                bne     1b
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.less8_byteonly:
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                tst     len, #1
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                beq     .done
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                load1b  r8
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                adcs    sum, sum, r8            @ update checksum
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                strb    r8, [dst], #1
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                b       .done
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FN_ENTRY
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                mov     ip, sp
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                save_regs
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                sub     fp, ip, #4
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                cmp     len, #8                 @ Ensure that we have at least
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                blo     .less8                  @ 8 bytes to copy.
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                adds    sum, sum, #0            @ C = 0
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                tst     dst, #3                 @ Test destination alignment
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                blne    .dst_unaligned          @ align destination, return here
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                /*
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                 * Ok, the dst pointer is now 32bit aligned, and we know
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                 * that we must have more than 4 bytes to copy.  Note
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                 * that C contains the carry from the dst alignment above.
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                 */
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                tst     src, #3                 @ Test source alignment
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                bne     .src_not_aligned
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                /* Routine for src & dst aligned */
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                bics    ip, len, #15
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                beq     2f
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1:              load4l  r4, r5, r6, r7
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                stmia   dst!, {r4, r5, r6, r7}
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                adcs    sum, sum, r4
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                adcs    sum, sum, r5
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                adcs    sum, sum, r6
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                adcs    sum, sum, r7
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                sub     ip, ip, #16
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                teq     ip, #0
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                bne     1b
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2:              ands    ip, len, #12
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                beq     4f
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                tst     ip, #8
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                beq     3f
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                load2l  r4, r5
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                stmia   dst!, {r4, r5}
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                adcs    sum, sum, r4
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                adcs    sum, sum, r5
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                tst     ip, #4
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                beq     4f
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3:              load1l  r4
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                str     r4, [dst], #4
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                adcs    sum, sum, r4
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4:              ands    len, len, #3
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                beq     .done
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                load1l  r4
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                tst     len, #2
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                beq     .exit
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                adcs    sum, sum, r4, lsl #16
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                strb    r4, [dst], #1
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                mov     r4, r4, lsr #8
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                strb    r4, [dst], #1
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                mov     r4, r4, lsr #8
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.exit:          tst     len, #1
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                strneb  r4, [dst], #1
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                andne   r4, r4, #255
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                adcnes  sum, sum, r4
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153
                /*
154
                 * If the dst pointer was not 16-bit aligned, we
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                 * need to rotate the checksum here to get around
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                 * the inefficient byte manipulations in the
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                 * architecture independent code.
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                 */
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.done:          adc     r0, sum, #0
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                ldr     sum, [sp, #0]           @ dst
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                tst     sum, #1
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                movne   sum, r0, lsl #8
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                orrne   r0, sum, r0, lsr #24
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                load_regs       ea
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166
.src_not_aligned:
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                adc     sum, sum, #0            @ include C from dst alignment
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                and     ip, src, #3
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                bic     src, src, #3
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                load1l  r4
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                cmp     ip, #2
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                beq     .src2_aligned
173
                bhi     .src3_aligned
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                mov     r4, r4, lsr #8          @ C = 0
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                bics    ip, len, #15
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                beq     2f
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1:              load4l  r5, r6, r7, r8
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                orr     r4, r4, r5, lsl #24
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                mov     r5, r5, lsr #8
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                orr     r5, r5, r6, lsl #24
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                mov     r6, r6, lsr #8
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                orr     r6, r6, r7, lsl #24
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                mov     r7, r7, lsr #8
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                orr     r7, r7, r8, lsl #24
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                stmia   dst!, {r4, r5, r6, r7}
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                adcs    sum, sum, r4
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                adcs    sum, sum, r5
188
                adcs    sum, sum, r6
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                adcs    sum, sum, r7
190
                mov     r4, r8, lsr #8
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                sub     ip, ip, #16
192
                teq     ip, #0
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                bne     1b
194
2:              ands    ip, len, #12
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                beq     4f
196
                tst     ip, #8
197
                beq     3f
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                load2l  r5, r6
199
                orr     r4, r4, r5, lsl #24
200
                mov     r5, r5, lsr #8
201
                orr     r5, r5, r6, lsl #24
202
                stmia   dst!, {r4, r5}
203
                adcs    sum, sum, r4
204
                adcs    sum, sum, r5
205
                mov     r4, r6, lsr #8
206
                tst     ip, #4
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                beq     4f
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3:              load1l  r5
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                orr     r4, r4, r5, lsl #24
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                str     r4, [dst], #4
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                adcs    sum, sum, r4
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                mov     r4, r5, lsr #8
213
4:              ands    len, len, #3
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                beq     .done
215
                tst     len, #2
216
                beq     .exit
217
                adcs    sum, sum, r4, lsl #16
218
                strb    r4, [dst], #1
219
                mov     r4, r4, lsr #8
220
                strb    r4, [dst], #1
221
                mov     r4, r4, lsr #8
222
                b       .exit
223
 
224
.src2_aligned:  mov     r4, r4, lsr #16
225
                adds    sum, sum, #0
226
                bics    ip, len, #15
227
                beq     2f
228
1:              load4l  r5, r6, r7, r8
229
                orr     r4, r4, r5, lsl #16
230
                mov     r5, r5, lsr #16
231
                orr     r5, r5, r6, lsl #16
232
                mov     r6, r6, lsr #16
233
                orr     r6, r6, r7, lsl #16
234
                mov     r7, r7, lsr #16
235
                orr     r7, r7, r8, lsl #16
236
                stmia   dst!, {r4, r5, r6, r7}
237
                adcs    sum, sum, r4
238
                adcs    sum, sum, r5
239
                adcs    sum, sum, r6
240
                adcs    sum, sum, r7
241
                mov     r4, r8, lsr #16
242
                sub     ip, ip, #16
243
                teq     ip, #0
244
                bne     1b
245
2:              ands    ip, len, #12
246
                beq     4f
247
                tst     ip, #8
248
                beq     3f
249
                load2l  r5, r6
250
                orr     r4, r4, r5, lsl #16
251
                mov     r5, r5, lsr #16
252
                orr     r5, r5, r6, lsl #16
253
                stmia   dst!, {r4, r5}
254
                adcs    sum, sum, r4
255
                adcs    sum, sum, r5
256
                mov     r4, r6, lsr #16
257
                tst     ip, #4
258
                beq     4f
259
3:              load1l  r5
260
                orr     r4, r4, r5, lsl #16
261
                str     r4, [dst], #4
262
                adcs    sum, sum, r4
263
                mov     r4, r5, lsr #16
264
4:              ands    len, len, #3
265
                beq     .done
266
                tst     len, #2
267
                beq     .exit
268
                adcs    sum, sum, r4, lsl #16
269
                strb    r4, [dst], #1
270
                mov     r4, r4, lsr #8
271
                strb    r4, [dst], #1
272
                tst     len, #1
273
                beq     .done
274
                load1b  r4
275
                b       .exit
276
 
277
.src3_aligned:  mov     r4, r4, lsr #24
278
                adds    sum, sum, #0
279
                bics    ip, len, #15
280
                beq     2f
281
1:              load4l  r5, r6, r7, r8
282
                orr     r4, r4, r5, lsl #8
283
                mov     r5, r5, lsr #24
284
                orr     r5, r5, r6, lsl #8
285
                mov     r6, r6, lsr #24
286
                orr     r6, r6, r7, lsl #8
287
                mov     r7, r7, lsr #24
288
                orr     r7, r7, r8, lsl #8
289
                stmia   dst!, {r4, r5, r6, r7}
290
                adcs    sum, sum, r4
291
                adcs    sum, sum, r5
292
                adcs    sum, sum, r6
293
                adcs    sum, sum, r7
294
                mov     r4, r8, lsr #24
295
                sub     ip, ip, #16
296
                teq     ip, #0
297
                bne     1b
298
2:              ands    ip, len, #12
299
                beq     4f
300
                tst     ip, #8
301
                beq     3f
302
                load2l  r5, r6
303
                orr     r4, r4, r5, lsl #8
304
                mov     r5, r5, lsr #24
305
                orr     r5, r5, r6, lsl #8
306
                stmia   dst!, {r4, r5}
307
                adcs    sum, sum, r4
308
                adcs    sum, sum, r5
309
                mov     r4, r6, lsr #24
310
                tst     ip, #4
311
                beq     4f
312
3:              load1l  r5
313
                orr     r4, r4, r5, lsl #8
314
                str     r4, [dst], #4
315
                adcs    sum, sum, r4
316
                mov     r4, r5, lsr #24
317
4:              ands    len, len, #3
318
                beq     .done
319
                tst     len, #2
320
                beq     .exit
321
                adcs    sum, sum, r4, lsl #16
322
                strb    r4, [dst], #1
323
                load1l  r4
324
                strb    r4, [dst], #1
325
                adcs    sum, sum, r4, lsl #24
326
                mov     r4, r4, lsr #8
327
                b       .exit

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