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tv80 Core Documentation
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OpenCores.org
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ghutchis@opencores.org
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General
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private
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XML
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Extensible Markup Language
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A synthesizable 8-bit microprocessor which is instruction-set compatable
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with the Z80, targetted at embedded and system-on-a-chip designs.
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Environment memory space is divided into a 32k ROM region and a 32k RAM
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region, as follows:
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  0000-7FFF:  ROM
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  8000-FFFF:  RAM
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Environment I/O space is allocated as follows:
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  00-0F:  Unused
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  10-1F:  Test devices
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  20-7F:  Unused
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  80-9F:  Environment control
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  A0-FF:  Unused
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The tv80 environment is controlled by the program under simulation.  The
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program can affect the environment through a set of control registers,
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which are mapped into I/O space.
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        Write '01' to end simulation with test passed
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        Write '02' to end with test failed
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        Write '03' to turn on dumping
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        Write '04' to turn off dumping
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        Write characters to this port one at a time.  When the
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        newline ('\n', ASCII 0x0A) character is written, the
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        environment will print out the collected string.
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        Bit[0] enables the timeout counter
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        Bit[1] resets the counter to 0
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        Timeout counter defaults to enabled at simulation start
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        Holds 16-bit timeout value (amount of time in clocks before
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        timeout error occurs).
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        When set, starts a countdown (in clocks) until assertion of
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        the INT_N signal.
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