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alfoltran |
/////////////////////////////////////////////////////////////////////
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//// ////
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//// USB Packet Disassembler ////
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//// ////
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//// SystemC Version: usb_pd_sie.cpp ////
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//// Author: Alfredo Luiz Foltran Fialho ////
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//// alfoltran@ig.com.br ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Verilog Version: usb1_pd.v ////
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//// Copyright (C) 2000-2002 Rudolf Usselmann ////
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//// www.asics.ws ////
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//// rudi@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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#include "systemc.h"
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#include "usb_pd_sie.h"
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void usb_pd_sie::rx_busy_up1(void) {
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if (!rst.read())
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rx_busy_d.write(false);
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else if (rx_valid.read() && (state.read() == PD_DATA))
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rx_busy_d.write(true);
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else if (state.read() != PD_DATA)
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rx_busy_d.write(false);
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}
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void usb_pd_sie::rx_busy_up2(void) {
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rx_busy.write(rx_busy_d.read());
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}
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void usb_pd_sie::pid_ld_up(void) {
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pid_ld_en.write(pid_le_sm.read() && rx_active.read() && rx_valid.read());
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}
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void usb_pd_sie::pid_up(void) {
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if (!rst.read())
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pid.write(0xf0);
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else if (pid_ld_en.read())
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pid.write(rx_data.read());
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}
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void usb_pd_sie::pid_cks_err_up(void) {
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pid_cks_err.write(pid.read().range(3, 0) != ~pid.read().range(7, 4));
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}
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void usb_pd_sie::pid_decoder(void) {
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pid_OUT.write(pid.read().range(3, 0) == USBF_T_PID_OUT);
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pid_IN.write(pid.read().range(3, 0) == USBF_T_PID_IN);
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pid_SOF.write(pid.read().range(3, 0) == USBF_T_PID_SOF);
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pid_SETUP.write(pid.read().range(3, 0) == USBF_T_PID_SETUP);
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pid_DATA0.write(pid.read().range(3, 0) == USBF_T_PID_DATA0);
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pid_DATA1.write(pid.read().range(3, 0) == USBF_T_PID_DATA1);
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pid_DATA2.write(pid.read().range(3, 0) == USBF_T_PID_DATA2);
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pid_MDATA.write(pid.read().range(3, 0) == USBF_T_PID_MDATA);
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pid_ACK.write(pid.read().range(3, 0) == USBF_T_PID_ACK);
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pid_NACK.write(pid.read().range(3, 0) == USBF_T_PID_NACK);
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pid_STALL.write(pid.read().range(3, 0) == USBF_T_PID_STALL);
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pid_NYET.write(pid.read().range(3, 0) == USBF_T_PID_NYET);
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pid_PRE.write(pid.read().range(3, 0) == USBF_T_PID_PRE);
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pid_ERR.write(pid.read().range(3, 0) == USBF_T_PID_ERR);
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pid_SPLIT.write(pid.read().range(3, 0) == USBF_T_PID_SPLIT);
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pid_PING.write(pid.read().range(3, 0) == USBF_T_PID_PING);
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pid_RES.write(pid.read().range(3, 0) == USBF_T_PID_RES);
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}
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void usb_pd_sie::pid_token_up(void) {
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pid_TOKEN.write(pid_OUT.read() || pid_IN.read() || pid_SOF.read() || pid_SETUP.read() || pid_PING.read());
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}
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void usb_pd_sie::pid_data_up(void) {
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pid_DATA.write(pid_DATA0.read() || pid_DATA1.read() || pid_DATA2.read() || pid_MDATA.read());
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}
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void usb_pd_sie::token_decoder(void) {
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if (token_le_1.read())
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token0.write(rx_data.read());
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if (token_le_2.read())
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token1.write(rx_data.read());
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}
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void usb_pd_sie::token_valid_up1(void) {
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token_valid_r1.write(token_le_2.read());
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}
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void usb_pd_sie::token_valid_up2(void) {
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token_valid_str1.write(token_valid_r1.read() || pid_ack.read());
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}
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void usb_pd_sie::token_valid_up3(void) {
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token_valid.write(token_valid_str1.read());
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}
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void usb_pd_sie::token_up(void) {
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frame_no.write(((sc_uint<3>)token1.read().range(2, 0), token0.read()));
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token_fadr.write((sc_uint<7>)token0.read().range(6, 0));
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token_endp.write(((sc_uint<3>)token1.read().range(2, 0), (sc_uint<1>)token0.read()[7]));
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token_crc5.write((sc_uint<5>)token1.read().range(7, 3));
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}
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// CRC5 should perform the check in one cycle (flow through logic)
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// 11 bits and crc5 input, 1 bit output
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void usb_pd_sie::crc5_din_up(void) {
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#ifdef USB_SIMULATION
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crc5_din.write(( (sc_uint<1>)token_fadr.read()[0],
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(sc_uint<1>)token_fadr.read()[1],
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(sc_uint<1>)token_fadr.read()[2],
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(sc_uint<1>)token_fadr.read()[3],
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(sc_uint<1>)token_fadr.read()[4],
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(sc_uint<1>)token_fadr.read()[5],
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(sc_uint<1>)token_fadr.read()[6],
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(sc_uint<1>)token_endp.read()[0],
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(sc_uint<1>)token_endp.read()[1],
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(sc_uint<1>)token_endp.read()[2],
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(sc_uint<1>)token_endp.read()[3]));
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#else
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crc5_din.write(((sc_uint<7>)token_fadr.read().range(0, 6), (sc_uint<4>)token_endp.read().range(0, 3)));
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#endif
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}
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void usb_pd_sie::crc5_err_up(void) {
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crc5_err.write(token_valid.read() && (crc5_out2.read() != token_crc5.read()));
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}
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// Invert and reverse result bits
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void usb_pd_sie::crc5_out2_up(void) {
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#ifdef USB_SIMULATION
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crc5_out2.write(( (sc_uint<1>)!crc5_out.read()[0],
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(sc_uint<1>)!crc5_out.read()[1],
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(sc_uint<1>)!crc5_out.read()[2],
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(sc_uint<1>)!crc5_out.read()[3],
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(sc_uint<1>)!crc5_out.read()[4]));
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#else
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crc5_out2.write((sc_uint<5>)~crc5_out.read().range(0, 4));
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#endif
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}
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// Data receiving logic
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// Build a delay line and stop when we are about to get crc
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void usb_pd_sie::rxv1_up(void) {
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if (!rst.read())
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rxv1.write(false);
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else if (data_valid_d.read())
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rxv1.write(true);
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else if (data_done.read())
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rxv1.write(false);
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}
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void usb_pd_sie::rxv2_up(void) {
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if (!rst.read())
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rxv2.write(false);
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else if (rxv1.read() && data_valid_d.read())
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rxv2.write(true);
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else if (data_done.read())
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rxv2.write(false);
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}
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void usb_pd_sie::data_valid0_up(void) {
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data_valid0.write(rxv2.read() && data_valid_d.read());
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}
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void usb_pd_sie::d_up(void) {
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if (data_valid_d.read())
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d0.write(rx_data.read());
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if (data_valid_d.read())
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d1.write(d0.read());
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if (data_valid_d.read())
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d2.write(d1.read());
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}
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void usb_pd_sie::rx_data_st_up(void) {
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rx_data_st.write(d2.read());
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}
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void usb_pd_sie::rx_data_valid_up(void) {
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rx_data_valid.write(data_valid0.read());
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}
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void usb_pd_sie::rx_data_done_up(void) {
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rx_data_done.write(data_done.read());
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}
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// CRC16 accumulates rx_data as long as data_valid_d is asserted.
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// When data_done is asserted, CRC16 reports status, and resets itself
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// next cycle
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void usb_pd_sie::rx_active_r_up(void) {
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rx_active_r.write(rx_active.read());
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}
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void usb_pd_sie::crc16_din_up(void) {
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#ifdef USB_SIMULATION
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crc16_din.write(( (sc_uint<1>)rx_data.read()[0],
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(sc_uint<1>)rx_data.read()[1],
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(sc_uint<1>)rx_data.read()[2],
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(sc_uint<1>)rx_data.read()[3],
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(sc_uint<1>)rx_data.read()[4],
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(sc_uint<1>)rx_data.read()[5],
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(sc_uint<1>)rx_data.read()[6],
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(sc_uint<1>)rx_data.read()[7]));
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#else
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crc16_din.write((sc_uint<8>)rx_data.read().range(0, 7));
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#endif
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}
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void usb_pd_sie::crc16_clr_up(void) {
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crc16_clr.write(rx_active.read() && !rx_active_r.read());
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}
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void usb_pd_sie::crc16_sum_up(void) {
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if (crc16_clr.read())
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crc16_sum.write(0xffff);
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else if (data_valid_d.read())
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crc16_sum.write(crc16_out.read());
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}
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void usb_pd_sie::crc16_err_up(void) {
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crc16_err.write(data_done.read() && (crc16_sum.read() != 0x800d));
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}
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| 244 |
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// Receive and Decode FSM
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void usb_pd_sie::state_up(void) {
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if (!rst.read())
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| 248 |
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state.write(PD_IDLE);
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else
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| 250 |
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state.write(next_state.read());
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}
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| 252 |
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| 253 |
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void usb_pd_sie::pd_statemachine(void) {
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| 254 |
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next_state.write(state.read()); // Default don't change current state
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| 255 |
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pid_le_sm.write(false);
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token_le_1.write(false);
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token_le_2.write(false);
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data_valid_d.write(false);
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data_done.write(false);
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seq_err.write(false);
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pid_ack.write(false);
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| 262 |
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| 263 |
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switch (state.read()) {// synopsys full_case parallel_case
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| 264 |
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case PD_IDLE: pid_le_sm.write(true);
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| 265 |
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if (rx_valid.read() && rx_active.read())
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| 266 |
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next_state.write(PD_ACTIVE);
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| 267 |
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break;
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| 268 |
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case PD_ACTIVE: // Received a ACK from host
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| 269 |
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if (pid_ACK.read() && !rx_err.read()) {
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| 270 |
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pid_ack.write(true);
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| 271 |
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if (!rx_active.read())
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| 272 |
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next_state.write(PD_IDLE);
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| 273 |
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| 274 |
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// Receiving a TOKEN
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| 275 |
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} else if (pid_TOKEN.read() && rx_valid.read() && rx_active.read() &&
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| 276 |
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!rx_err.read()) {
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| 277 |
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token_le_1.write(true);
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next_state.write(PD_TOKEN);
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| 279 |
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| 280 |
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// Receiving DATA
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| 281 |
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} else if (pid_DATA.read() && rx_valid.read() && rx_active.read() &&
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| 282 |
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!rx_err.read()) {
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| 283 |
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data_valid_d.write(true);
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| 284 |
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next_state.write(PD_DATA);
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| 285 |
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| 286 |
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// ERROR
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| 287 |
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} else if (!rx_active.read() || rx_err.read() ||
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| 288 |
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(rx_valid.read() && !(pid_TOKEN.read() || pid_DATA.read()))) {
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| 289 |
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seq_err.write(!rx_err.read());
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| 290 |
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if (!rx_active.read())
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| 291 |
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next_state.write(PD_IDLE);
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| 292 |
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}
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| 293 |
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break;
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| 294 |
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case PD_TOKEN: if (rx_valid.read() && rx_active.read() && !rx_err.read()) {
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| 295 |
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token_le_2.write(true);
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| 296 |
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next_state.write(PD_IDLE);
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| 297 |
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| 298 |
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// ERROR
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| 299 |
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} else if (!rx_active.read() || rx_err.read()) {
|
| 300 |
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seq_err.write(!rx_err.read());
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| 301 |
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if (!rx_active.read())
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| 302 |
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next_state.write(PD_IDLE);
|
| 303 |
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}
|
| 304 |
|
|
break;
|
| 305 |
|
|
case PD_DATA: if (rx_valid.read() && rx_active.read() && !rx_err.read())
|
| 306 |
|
|
data_valid_d.write(true);
|
| 307 |
|
|
if (!rx_active.read() || rx_err.read()) {
|
| 308 |
|
|
data_done.write(true);
|
| 309 |
|
|
if (!rx_active.read())
|
| 310 |
|
|
next_state.write(PD_IDLE);
|
| 311 |
|
|
}
|
| 312 |
|
|
break;
|
| 313 |
|
|
}
|
| 314 |
|
|
}
|
| 315 |
|
|
/*
|
| 316 |
|
|
usb_pd_sie::~usb_pd_sie(void) {
|
| 317 |
|
|
if (i_crc5)
|
| 318 |
|
|
delete i_crc5;
|
| 319 |
|
|
if (i_crc16)
|
| 320 |
|
|
delete i_crc16;
|
| 321 |
|
|
}
|
| 322 |
|
|
*/
|