| 1 |
42 |
zeus |
#vdel -all -lib work
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| 2 |
29 |
zeus |
vmap unisims /opt/Xilinx/10.1/modelsim/verilog/unisims
|
| 3 |
28 |
zeus |
vlib work
|
| 4 |
30 |
zeus |
vlog -work work -lint +incdir+../../rtl-model +incdir+.. ../../rtl-model/regfile.v ../../rtl-model/alu.v ../../rtl-model/cpu.v ../../rtl-model/exec.v ../../rtl-model/fetch.v ../../rtl-model/jmp_cond.v ../../rtl-model/util/primitives.v ../../rtl-model/util/div_su.v ../../rtl-model/util/div_uu.v ../../rtl-model/rotate.v
|
| 5 |
29 |
zeus |
vlog -work work +incdir+.. ../memory.v ../testbench.v ../mult.v
|
| 6 |
|
|
vlog -work unisims /opt/Xilinx/10.1/ISE/verilog/src/glbl.v
|
| 7 |
|
|
vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ns work.testbench work.glbl
|
| 8 |
22 |
zeus |
add wave -label clk /testbench/clk
|
| 9 |
|
|
add wave -label rst /testbench/rst
|
| 10 |
|
|
add wave -label pc -radix hexadecimal /testbench/cpu0/fetch0/pc
|
| 11 |
|
|
add wave -divider fetch
|
| 12 |
|
|
add wave -label state -radix hexadecimal /testbench/cpu0/fetch0/state
|
| 13 |
|
|
add wave -label next_state -radix hexadecimal /testbench/cpu0/fetch0/next_state
|
| 14 |
|
|
add wave -label opcode -radix hexadecimal /testbench/cpu0/fetch0/opcode
|
| 15 |
|
|
add wave -label modrm -radix hexadecimal /testbench/cpu0/fetch0/modrm
|
| 16 |
|
|
add wave -label seq_addr /testbench/cpu0/fetch0/decode0/seq_addr
|
| 17 |
|
|
add wave -label end_seq /testbench/cpu0/fetch0/end_seq
|
| 18 |
|
|
add wave -label need_modrm /testbench/cpu0/fetch0/need_modrm
|
| 19 |
|
|
add wave -label need_off /testbench/cpu0/fetch0/need_off
|
| 20 |
|
|
add wave -label need_imm /testbench/cpu0/fetch0/need_imm
|
| 21 |
|
|
add wave -label ir /testbench/cpu0/fetch0/ir
|
| 22 |
|
|
add wave -label imm -radix hexadecimal /testbench/cpu0/fetch0/imm
|
| 23 |
|
|
add wave -label off -radix hexadecimal /testbench/cpu0/fetch0/off
|
| 24 |
42 |
zeus |
add wave -label intr -radix hexadecimal /testbench/intr
|
| 25 |
|
|
add wave -label intr -radix hexadecimal /testbench/cpu0/fetch0/decode0/intr
|
| 26 |
|
|
add wave -label inta -radix hexadecimal /testbench/inta
|
| 27 |
|
|
add wave -label ext_int -radix hexadecimal /testbench/cpu0/fetch0/decode0/ext_int
|
| 28 |
|
|
add wave -label repz_pr -radix hexadecimal /testbench/cpu0/fetch0/repz_pr
|
| 29 |
35 |
zeus |
add wave -divider mem
|
| 30 |
|
|
add wave -label cs -radix hexadecimal /testbench/cpu0/wm0/cs
|
| 31 |
|
|
add wave -label op -radix hexadecimal /testbench/cpu0/wm0/op
|
| 32 |
|
|
add wave -label block /testbench/cpu0/wm0/cpu_block
|
| 33 |
|
|
add wave -label dat_o -radix hexadecimal sim:/testbench/dat_o
|
| 34 |
|
|
add wave -label dat_i -radix hexadecimal sim:/testbench/dat_i
|
| 35 |
|
|
add wave -label adr -radix hexadecimal /testbench/adr
|
| 36 |
|
|
add wave -label byte_o -radix hexadecimal /cpu0/wm0/cpu_byte_o
|
| 37 |
|
|
add wave -label sel_o -radix hexadecimal /cpu0/wm0/wb_sel_o
|
| 38 |
|
|
add wave -label stb_o -radix hexadecimal /cpu0/wm0/wb_stb_o
|
| 39 |
|
|
add wave -label cyc_o -radix hexadecimal /cpu0/wm0/wb_cyc_o
|
| 40 |
|
|
add wave -label ack_i -radix hexadecimal /cpu0/wm0/wb_ack_i
|
| 41 |
|
|
add wave -label we_o -radix hexadecimal /cpu0/wm0/wb_we_o
|
| 42 |
|
|
add wave -label tga_o -radix hexadecimal /cpu0/wm0/wb_tga_o
|
| 43 |
22 |
zeus |
add wave -divider alu
|
| 44 |
|
|
add wave -label x -radix hexadecimal /testbench/cpu0/exec0/a
|
| 45 |
|
|
add wave -label y -radix hexadecimal /testbench/cpu0/exec0/bus_b
|
| 46 |
24 |
zeus |
add wave -label t -radix hexadecimal /testbench/cpu0/exec0/alu0/t
|
| 47 |
|
|
add wave -label func -radix hexadecimal /testbench/cpu0/exec0/alu0/func
|
| 48 |
22 |
zeus |
add wave -label r\[15\] -radix hexadecimal /testbench/cpu0/exec0/reg0/r\[15\]
|
| 49 |
|
|
add wave -label d -radix hexadecimal /testbench/cpu0/exec0/reg0/d
|
| 50 |
|
|
add wave -label addr_a /testbench/cpu0/exec0/reg0/addr_a
|
| 51 |
|
|
add wave -label addr_d /testbench/cpu0/exec0/reg0/addr_d
|
| 52 |
|
|
add wave -label wr /testbench/cpu0/exec0/reg0/wr
|
| 53 |
|
|
add wave -label we /testbench/we
|
| 54 |
35 |
zeus |
add wave -label ack /testbench/ack
|
| 55 |
22 |
zeus |
add wave -label fetch_or_exec /testbench/cpu0/fetch_or_exec
|
| 56 |
42 |
zeus |
add wave -divider regfile
|
| 57 |
|
|
add wave -label cx -radix hexadecimal /testbench/cpu0/exec0/reg0/r\[1\]
|
| 58 |
|
|
add wave -label tmp -radix hexadecimal /testbench/cpu0/exec0/reg0/r\[13\]
|
| 59 |
|
|
add wave -label cs -radix hexadecimal /testbench/cpu0/exec0/reg0/r\[9\]
|
| 60 |
|
|
add wave -label ip -radix hexadecimal /testbench/cpu0/exec0/reg0/r\[15\]
|
| 61 |
|
|
add wave -divider Wishbone-Master
|
| 62 |
|
|
add wave -label cpu_dat_i -radix hexadecimal /cpu0/wm0/cpu_dat_i
|
| 63 |
|
|
add wave -label cs -radix hexadecimal /cpu0/wm0/cs
|
| 64 |
|
|
|
| 65 |
|
|
run 20us
|
