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[/] [System09/] [trunk/] [rtl/] [Cyclone2/] [pll.vhd] - Blame information for rev 116

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1 116 dilbert57
-- megafunction wizard: %ALTPLL%
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-- GENERATION: STANDARD
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-- VERSION: WM1.0
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-- MODULE: altpll 
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6
-- ============================================================
7
-- File Name: pll.vhd
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-- Megafunction Name(s):
9
--                      altpll
10
--
11
-- Simulation Library Files(s):
12
--                      altera_mf
13
-- ============================================================
14
-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
16
--
17
-- 9.1 Build 304 01/25/2010 SP 1 SJ Web Edition
18
-- ************************************************************
19
 
20
 
21
--Copyright (C) 1991-2010 Altera Corporation
22
--Your use of Altera Corporation's design tools, logic functions 
23
--and other software and tools, and its AMPP partner logic 
24
--functions, and any output files from any of the foregoing 
25
--(including device programming or simulation files), and any 
26
--associated documentation or information are expressly subject 
27
--to the terms and conditions of the Altera Program License 
28
--Subscription Agreement, Altera MegaCore Function License 
29
--Agreement, or other applicable license agreement, including, 
30
--without limitation, that your use is for the sole purpose of 
31
--programming logic devices manufactured by Altera and sold by 
32
--Altera or its authorized distributors.  Please refer to the 
33
--applicable agreement for further details.
34
 
35
 
36
LIBRARY ieee;
37
USE ieee.std_logic_1164.all;
38
 
39
LIBRARY altera_mf;
40
USE altera_mf.all;
41
 
42
ENTITY pll IS
43
        PORT
44
        (
45
                areset          : IN STD_LOGIC  := '0';
46
                inclk0          : IN STD_LOGIC  := '0';
47
                c0              : OUT STD_LOGIC ;
48
                c1              : OUT STD_LOGIC ;
49
                c2              : OUT STD_LOGIC ;
50
                locked          : OUT STD_LOGIC
51
        );
52
END pll;
53
 
54
 
55
ARCHITECTURE SYN OF pll IS
56
 
57
        SIGNAL sub_wire0        : STD_LOGIC_VECTOR (5 DOWNTO 0);
58
        SIGNAL sub_wire1        : STD_LOGIC ;
59
        SIGNAL sub_wire2        : STD_LOGIC ;
60
        SIGNAL sub_wire3        : STD_LOGIC ;
61
        SIGNAL sub_wire4        : STD_LOGIC ;
62
        SIGNAL sub_wire5        : STD_LOGIC ;
63
        SIGNAL sub_wire6        : STD_LOGIC_VECTOR (1 DOWNTO 0);
64
        SIGNAL sub_wire7_bv     : BIT_VECTOR (0 DOWNTO 0);
65
        SIGNAL sub_wire7        : STD_LOGIC_VECTOR (0 DOWNTO 0);
66
 
67
 
68
 
69
        COMPONENT altpll
70
        GENERIC (
71
                clk0_divide_by          : NATURAL;
72
                clk0_duty_cycle         : NATURAL;
73
                clk0_multiply_by                : NATURAL;
74
                clk0_phase_shift                : STRING;
75
                clk1_divide_by          : NATURAL;
76
                clk1_duty_cycle         : NATURAL;
77
                clk1_multiply_by                : NATURAL;
78
                clk1_phase_shift                : STRING;
79
                clk2_divide_by          : NATURAL;
80
                clk2_duty_cycle         : NATURAL;
81
                clk2_multiply_by                : NATURAL;
82
                clk2_phase_shift                : STRING;
83
                compensate_clock                : STRING;
84
                gate_lock_signal                : STRING;
85
                inclk0_input_frequency          : NATURAL;
86
                intended_device_family          : STRING;
87
                invalid_lock_multiplier         : NATURAL;
88
                lpm_hint                : STRING;
89
                lpm_type                : STRING;
90
                operation_mode          : STRING;
91
                port_activeclock                : STRING;
92
                port_areset             : STRING;
93
                port_clkbad0            : STRING;
94
                port_clkbad1            : STRING;
95
                port_clkloss            : STRING;
96
                port_clkswitch          : STRING;
97
                port_configupdate               : STRING;
98
                port_fbin               : STRING;
99
                port_inclk0             : STRING;
100
                port_inclk1             : STRING;
101
                port_locked             : STRING;
102
                port_pfdena             : STRING;
103
                port_phasecounterselect         : STRING;
104
                port_phasedone          : STRING;
105
                port_phasestep          : STRING;
106
                port_phaseupdown                : STRING;
107
                port_pllena             : STRING;
108
                port_scanaclr           : STRING;
109
                port_scanclk            : STRING;
110
                port_scanclkena         : STRING;
111
                port_scandata           : STRING;
112
                port_scandataout                : STRING;
113
                port_scandone           : STRING;
114
                port_scanread           : STRING;
115
                port_scanwrite          : STRING;
116
                port_clk0               : STRING;
117
                port_clk1               : STRING;
118
                port_clk2               : STRING;
119
                port_clk3               : STRING;
120
                port_clk4               : STRING;
121
                port_clk5               : STRING;
122
                port_clkena0            : STRING;
123
                port_clkena1            : STRING;
124
                port_clkena2            : STRING;
125
                port_clkena3            : STRING;
126
                port_clkena4            : STRING;
127
                port_clkena5            : STRING;
128
                port_extclk0            : STRING;
129
                port_extclk1            : STRING;
130
                port_extclk2            : STRING;
131
                port_extclk3            : STRING;
132
                valid_lock_multiplier           : NATURAL
133
        );
134
        PORT (
135
                        inclk   : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
136
                        locked  : OUT STD_LOGIC ;
137
                        areset  : IN STD_LOGIC ;
138
                        clk     : OUT STD_LOGIC_VECTOR (5 DOWNTO 0)
139
        );
140
        END COMPONENT;
141
 
142
BEGIN
143
        sub_wire7_bv(0 DOWNTO 0) <= "0";
144
        sub_wire7    <= To_stdlogicvector(sub_wire7_bv);
145
        sub_wire3    <= sub_wire0(2);
146
        sub_wire2    <= sub_wire0(1);
147
        sub_wire1    <= sub_wire0(0);
148
        c0    <= sub_wire1;
149
        c1    <= sub_wire2;
150
        c2    <= sub_wire3;
151
        locked    <= sub_wire4;
152
        sub_wire5    <= inclk0;
153
        sub_wire6    <= sub_wire7(0 DOWNTO 0) & sub_wire5;
154
 
155
        altpll_component : altpll
156
        GENERIC MAP (
157
                clk0_divide_by => 1,
158
                clk0_duty_cycle => 50,
159
                clk0_multiply_by => 1,
160
                clk0_phase_shift => "0",
161
                clk1_divide_by => 2,
162
                clk1_duty_cycle => 50,
163
                clk1_multiply_by => 1,
164
                clk1_phase_shift => "0",
165
                clk2_divide_by => 2,
166
                clk2_duty_cycle => 50,
167
                clk2_multiply_by => 1,
168
                clk2_phase_shift => "0",
169
                compensate_clock => "CLK0",
170
                gate_lock_signal => "NO",
171
                inclk0_input_frequency => 20000,
172
                intended_device_family => "Cyclone II",
173
                invalid_lock_multiplier => 5,
174
                lpm_hint => "CBX_MODULE_PREFIX=pll",
175
                lpm_type => "altpll",
176
                operation_mode => "NORMAL",
177
                port_activeclock => "PORT_UNUSED",
178
                port_areset => "PORT_USED",
179
                port_clkbad0 => "PORT_UNUSED",
180
                port_clkbad1 => "PORT_UNUSED",
181
                port_clkloss => "PORT_UNUSED",
182
                port_clkswitch => "PORT_UNUSED",
183
                port_configupdate => "PORT_UNUSED",
184
                port_fbin => "PORT_UNUSED",
185
                port_inclk0 => "PORT_USED",
186
                port_inclk1 => "PORT_UNUSED",
187
                port_locked => "PORT_USED",
188
                port_pfdena => "PORT_UNUSED",
189
                port_phasecounterselect => "PORT_UNUSED",
190
                port_phasedone => "PORT_UNUSED",
191
                port_phasestep => "PORT_UNUSED",
192
                port_phaseupdown => "PORT_UNUSED",
193
                port_pllena => "PORT_UNUSED",
194
                port_scanaclr => "PORT_UNUSED",
195
                port_scanclk => "PORT_UNUSED",
196
                port_scanclkena => "PORT_UNUSED",
197
                port_scandata => "PORT_UNUSED",
198
                port_scandataout => "PORT_UNUSED",
199
                port_scandone => "PORT_UNUSED",
200
                port_scanread => "PORT_UNUSED",
201
                port_scanwrite => "PORT_UNUSED",
202
                port_clk0 => "PORT_USED",
203
                port_clk1 => "PORT_USED",
204
                port_clk2 => "PORT_USED",
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                port_clk3 => "PORT_UNUSED",
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                port_clk4 => "PORT_UNUSED",
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                port_clk5 => "PORT_UNUSED",
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                port_clkena0 => "PORT_UNUSED",
209
                port_clkena1 => "PORT_UNUSED",
210
                port_clkena2 => "PORT_UNUSED",
211
                port_clkena3 => "PORT_UNUSED",
212
                port_clkena4 => "PORT_UNUSED",
213
                port_clkena5 => "PORT_UNUSED",
214
                port_extclk0 => "PORT_UNUSED",
215
                port_extclk1 => "PORT_UNUSED",
216
                port_extclk2 => "PORT_UNUSED",
217
                port_extclk3 => "PORT_UNUSED",
218
                valid_lock_multiplier => 1
219
        )
220
        PORT MAP (
221
                inclk => sub_wire6,
222
                areset => areset,
223
                clk => sub_wire0,
224
                locked => sub_wire4
225
        );
226
 
227
 
228
 
229
END SYN;
230
 
231
-- ============================================================
232
-- CNX file retrieval info
233
-- ============================================================
234
-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
235
-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
236
-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
237
-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
238
-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
239
-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
240
-- Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
241
-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
242
-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
243
-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
244
-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "1"
245
-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
246
-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
247
-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
248
-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
249
-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
250
-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any"
251
-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
252
-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1"
253
-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "1"
254
-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
255
-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
256
-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
257
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "50.000000"
258
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "25.000000"
259
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "25.000000"
260
-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
261
-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
262
-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
263
-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "1"
264
-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
265
-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
266
-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
267
-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000"
268
-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
269
-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
270
-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
271
-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
272
-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
273
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
274
-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
275
-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
276
-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
277
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "300.000"
278
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
279
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
280
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
281
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "deg"
282
-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
283
-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
284
-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
285
-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
286
-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
287
-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
288
-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "1"
289
-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
290
-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "50.00000000"
291
-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "25.00000000"
292
-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "25.00000000"
293
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
294
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
295
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "1"
296
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
297
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
298
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
299
-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0"
300
-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
301
-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
302
-- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
303
-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
304
-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
305
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
306
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
307
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
308
-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
309
-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1"
310
-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
311
-- Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0"
312
-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
313
-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
314
-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
315
-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
316
-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
317
-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
318
-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
319
-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif"
320
-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
321
-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
322
-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
323
-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
324
-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
325
-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
326
-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
327
-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
328
-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"
329
-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
330
-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
331
-- Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
332
-- Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
333
-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
334
-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
335
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
336
-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
337
-- Retrieval info: PRIVATE: USE_CLK1 STRING "1"
338
-- Retrieval info: PRIVATE: USE_CLK2 STRING "1"
339
-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
340
-- Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
341
-- Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
342
-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
343
-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
344
-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
345
-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
346
-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
347
-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
348
-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
349
-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "2"
350
-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
351
-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "1"
352
-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
353
-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "2"
354
-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
355
-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "1"
356
-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
357
-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
358
-- Retrieval info: CONSTANT: GATE_LOCK_SIGNAL STRING "NO"
359
-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000"
360
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
361
-- Retrieval info: CONSTANT: INVALID_LOCK_MULTIPLIER NUMERIC "5"
362
-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
363
-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
364
-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
365
-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_USED"
366
-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
367
-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
368
-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
369
-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
370
-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
371
-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
372
-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
373
-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
374
-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
375
-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
376
-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
377
-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
378
-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
379
-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
380
-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
381
-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
382
-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
383
-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
384
-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
385
-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
386
-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
387
-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
388
-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
389
-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
390
-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
391
-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
392
-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
393
-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
394
-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
395
-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
396
-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
397
-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
398
-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
399
-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
400
-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
401
-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
402
-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
403
-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
404
-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
405
-- Retrieval info: CONSTANT: VALID_LOCK_MULTIPLIER NUMERIC "1"
406
-- Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]"
407
-- Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]"
408
-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
409
-- Retrieval info: USED_PORT: areset 0 0 0 0 INPUT GND "areset"
410
-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
411
-- Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
412
-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
413
-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
414
-- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
415
-- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
416
-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
417
-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
418
-- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
419
-- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
420
-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
421
-- Retrieval info: CONNECT: @areset 0 0 0 0 areset 0 0 0 0
422
-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.vhd TRUE
423
-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE
424
-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc TRUE
425
-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp TRUE
426
-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf TRUE
427
-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.vhd TRUE
428
-- Retrieval info: LIB_FILE: altera_mf
429
-- Retrieval info: CBX_MODULE_PREFIX: ON

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