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[/] [System09/] [trunk/] [src/] [Noice/] [MON6809.ASM] - Blame information for rev 223

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1 22 dilbert57
*  6809 Debug monitor for use with NOICE09
2
*
3
*  Copyright (c) 1992-2006 by John Hartman
4
*
5
*  Modification History:
6
*       14-Jun-93 JLH release version
7
*       24-Aug-93 JLH bad constant for COMBUF length compare
8
*       25-Feb-98 JLH assemble with either Motorola or Dunfield
9
*        1-May-06 JLH slight cleanup
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*        4-Jul-06 JEK Modified for System09 ACIA at $E000/$E001
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*                     2K monitor RAM at $F000 - $F7FF
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*                     Allocated 1536 bytes ($600) for user stack.
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*                     disables watchdog timer
14
*
15
*============================================================================
16
*
17
*  To customize for a given target, you must change code in the
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*  hardware equates, the string TSTG, and the routines RESET and REWDT.
19
*  You may or may not need to change GETCHAR, PUTCHAR, depending on
20
*  how peculiar your UART is.
21
*
22
*  This file has been assembled with the Motorola Freeware assembler
23
*  available from the Motorola Freeware BBS and elsewhere.
24
*   BUT:  you must first "comment out" the conditionals as required,
25
*   because the Motorola assemblers do not have any IFEQ/ELSE/ENDIF
26
*
27
*  This file may also be assembled with the Dunfield assembler
28
*
29
*  To add mapped memory support:
30
*       1) Define map port MAPREG here
31
*       2) Define or import map port RAM image MAPIMG here if MAPREG is
32
*          write only.  (The application code must update MAPIMG before
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*          outputing to MAPREG)
34
*       3) Search for and modify MAPREG, MAPIMG, and REG_PAGE usage below
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*       4) In TSTG below edit "LOW AND HIGH LIMIT OF MAPPED MEM"
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*          to appropriate range (typically 4000H to 07FFFH for two-bit MMU)
37
*
38
*============================================================================
39
*
40
*  I/O equates for Heng's ROM emulator (set true if used)
41
***ROMEM   SET     1
42
*
43
*============================================================================
44
*  HARDWARE PLATFORM CUSTOMIZATIONS
45
*
46
*RAM_START       EQU     $D800           START OF MONITOR RAM
47
RAM_START       EQU     $F000           START OF MONITOR RAM
48
ROM_START       EQU     $FC00           START OF MONITOR CODE
49
HARD_VECT       EQU     $FFF0           START OF HARDWARE VECTORS
50
 
51
*============================================================================
52
*  Equates for memory mapped 16450 serial port on Heng's ROM emulator board
53
*;*        IFEQ ROMEM,1
54
*
55
*S16450  equ     $A000           base of 16450 UART
56
*RXR     equ     0                 Receiver buffer register
57
*TXR     equ     0                 Transmitter buffer register
58
*IER     equ     1                 Interrupt enable register
59
*LCR     equ     3                 Line control register
60
*MCR     equ     4                 Modem control register
61
*DTR     equ     1                 Bit equate used to control status LED
62
*LSR     equ     5                 Line status register
63
*
64
*  Define monitor serial port
65
*SER_STATUS      EQU     S16450+LSR
66
*SER_RXDATA      EQU     S16450+RXR
67
*SER_TXDATA      EQU     S16450+TXR
68
*RXRDY           EQU     $01              BIT MASK FOR RX BUFFER FULL
69
*TXRDY           EQU     $20              BIT MASK FOR TX BUFFER EMPTY
70
*;*        ELSE
71
*
72
*  Put you UART equates here
73
SER_STATUS      EQU     $E000
74
SER_RXDATA      EQU     $E001
75
SER_TXDATA      EQU     $E001
76
RXRDY           EQU     $01
77
TXRDY           EQU     $02
78
*
79
*;*        ENDIF
80
*
81
*  Watchdog timer (if any)  See REWDT for use
82
*WDT             EQU     $207
83
*
84
*  Condition code bits
85
C       EQU     1
86
I       EQU     10H
87
F       EQU     40H
88
E       EQU     80H
89
*
90
*============================================================================
91
*  RAM definitions:
92
        ORG     RAM_START
93
*
94
*  RAM interrupt vectors (first in SEG for easy addressing, else move to
95
*  their own SEG)
96
NVEC            EQU     8               number of vectors
97
RAMVEC          RMB     2*NVEC
98
*
99
*  Initial user stack
100
*  (Size and location is user option)
101
*                RMB     64
102
                RMB     $600
103
INITSTACK
104
*
105
*  Monitor stack
106
*  (Calculated use is at most 7 bytes.  Leave plenty of spare)
107
                RMB     16
108
MONSTACK
109
*
110
*  Target registers:  order must match that in TRGHC11.C
111
TASK_REGS
112
REG_STATE       RMB     1
113
REG_PAGE        RMB     1
114
REG_SP          RMB     2
115
REG_U           RMB     2
116
REG_Y           RMB     2
117
REG_X           RMB     2
118
REG_B           RMB     1               B BEFORE A, SO D IS LEAST SIG. FIRST
119
REG_A           RMB     1
120
REG_DP          RMB     1
121
REG_CC          RMB     1
122
REG_PC          RMB     2
123
TASK_REG_SZ     EQU     *-TASK_REGS
124
*
125
*  Communications buffer
126
*  (Must be at least as long as TASK_REG_SZ.  At least 19 bytes recommended.
127
*  Larger values may improve speed of NoICE memory move commands.)
128
COMBUF_SIZE     EQU     128             DATA SIZE FOR COMM BUFFER
129
COMBUF          RMB     2+COMBUF_SIZE+1 BUFFER ALSO HAS FN, LEN, AND CHECK
130
*
131
RAM_END         EQU     *               ADDRESS OF TOP+1 OF RAM
132
*
133
*===========================================================================
134
        ORG     ROM_START
135
*
136
*  Power on reset
137
RESET
138
*
139
*  Set CPU mode to safe state
140
        ORCC    #I+F            INTERRUPTS OFF
141
        LDS     #MONSTACK       CLEAN STACK IS HAPPY STACK
142
*
143
*----------------------------------------------------------------------------
144
*;*        IFEQ ROMEM,1
145
*
146
*  Initialize S16450 UART on ROM emulator
147
*
148
*  Delay here in case the UART has not come out of reset yet.
149
        LDX     #0
150
LOP     LEAX    -1,X                    DELAY FOR SLOW RESETTING UART
151
        NOP
152
        NOP
153
        BNE     LOP
154
*
155
*  access baud generator, no parity, 1 stop bit, 8 data bits
156
*        LDA     #$83
157
*        STA     S16450+LCR
158
*
159
*  fixed baud rate of 19200:  crystal is 3.686400 Mhz.
160
*  Divisor is 3,686400/(16*baud)
161
*        LDA     #12                     fix at 19.2 kbaud
162
*        STA     S16450+RXR              lsb
163
*        LDA     #0
164
*        STA     S16450+RXR+1            msb=0
165
*
166
*  access data registers, no parity, 1 stop bits, 8 data bits
167
*        LDA     #$03
168
*        STA     S16450+LCR
169
*
170
*  no loopback, OUT2 on, OUT1 on, RTS on, DTR (LED) on
171
*        LDA     #$0F
172
*        STA     S16450+MCR
173
*
174
*  disable all interrupts: modem, receive error, transmit, and receive
175
*        LDA     #$00
176
*        STA     S16450+IER
177
*
178
*;*        ELSE
179
*
180
*  Initialize your UART here
181
        LDA     #$03                    Reset ACIA
182
        STA     SER_STATUS
183
        LDA     #$11                    8 data 2 stop no parity
184
        STA     SER_STATUS
185
        TST     SER_RXDATA
186
*;*        ENDIF
187
*
188
*----------------------------------------------------------------------------
189
*
190
*  Initialize RAM interrupt vectors
191
        LDY     #INT_ENTRY      ADDRESS OF DEFAULT HANDLER
192
        LDX     #RAMVEC         POINTER TO RAM VECTORS
193
        LDB     #NVEC           NUMBER OF VECTORS
194
RES10   STY     ,X++            SET VECTOR
195
        DECB
196
        BNE     RES10
197
*
198
*  Initialize user registers
199
        LDD     #INITSTACK
200
        STA     REG_SP+1                INIT USER'S STACK POINTER MSB
201
        STB     REG_SP                  LSB
202
*
203
        LDD     #0
204
        STD     REG_PC
205
        STA     REG_A
206
        STA     REG_B
207
        STA     REG_DP
208
        STD     REG_X
209
        STD     REG_Y
210
        STD     REG_U
211
        STA     REG_STATE               initial state is "RESET"
212
*
213
*  Initialize memory paging variables and hardware (if any)
214
        STA     REG_PAGE                initial page is zero
215
*;;;    STA     MAPIMG
216
*;;;    STA     MAPREG                  set hardware map
217
*
218
        LDA     #E+I+F                  state "all regs pushed", no ints
219
        STA     REG_CC
220
*
221
*  Set function code for "GO".  Then if we reset after being told to
222
*  GO, we will come back with registers so user can see the crash
223
        LDA     #FN_RUN_TARG
224
        STA     COMBUF
225
        JMP     RETURN_REGS             DUMP REGS, ENTER MONITOR
226
*
227
*===========================================================================
228
*  Get a character to A
229
*
230
*  Return A=char, CY=0 if data received
231
*         CY=1 if timeout (0.5 seconds)
232
*
233
*  Uses 6 bytes of stack including return address
234
*
235
GETCHAR
236
        PSHS    X
237
        LDX     #0              LONG TIMEOUT
238
GC10    JSR     REWDT           PREVENT WATCHDOG TIMEOUT
239
        LEAX    -1,X
240
        BEQ     GC90            EXIT IF TIMEOUT
241
        LDA     SER_STATUS      READ DEVICE STATUS
242
        ANDA    #RXRDY
243
        BEQ     GC10            NOT READY YET.
244
*
245
*  Data received:  return CY=0. data in A
246
        CLRA                    CY=0
247
        LDA     SER_RXDATA      READ DATA
248
        PULS    X,PC
249
*
250
*  Timeout:  return CY=1
251
GC90    ORCC    #C              CY=1
252
        PULS    X,PC
253
*
254
*===========================================================================
255
*  Output character in A
256
*
257
*  Uses 5 bytes of stack including return address
258
*
259
PUTCHAR
260
        PSHS    A
261
PC10    JSR     REWDT           PREVENT WATCHDOG TIMEOUT
262
        LDA     SER_STATUS      CHECK TX STATUS
263
        ANDA    #TXRDY          RX READY ?
264
        BEQ     PC10
265
        PULS    A
266
        STA     SER_TXDATA      TRANSMIT CHAR.
267
        RTS
268
*
269
*======================================================================
270
*
271
*  RESET WATCHDOG TIMER.  MUST BE CALLED AT LEAST ONCE EVERY LITTLE WHILE
272
*  OR COP INTERRUPT WILL OCCUR
273
*
274
*  Uses 2 bytes of stack including return address
275
*
276
REWDT   CLRA
277
*        STA     WDT
278
        INCA
279
*        STA     WDT             CU-style WDT:  must leave bit high
280
        RTS
281
*
282
*======================================================================
283
*  Response string for GET TARGET STATUS request
284
*  Reply describes target:
285
TSTG    FCB     5                       2: PROCESSOR TYPE = 6809
286
        FCB     COMBUF_SIZE             3: SIZE OF COMMUNICATIONS BUFFER
287
        FCB     0                       4: NO TASKING SUPPORT
288
        FDB     0,0                     5-8: LOW AND HIGH LIMIT OF MAPPED MEM (NONE)
289
        FCB     B1-B0                   9:  BREAKPOINT INSTR LENGTH
290
B0      SWI                             10: BREAKPOINT INSTRUCTION
291
B1      FCC     '6809 monitor V1.0'     DESCRIPTION, ZERO
292
        FCB     0
293
TSTG_SIZE       EQU     *-TSTG          SIZE OF STRING
294
*
295
*======================================================================
296
*  HARDWARE PLATFORM INDEPENDENT EQUATES AND CODE
297
*
298
*  Communications function codes.
299
FN_GET_STAT     EQU     $FF    reply with device info
300
FN_READ_MEM     EQU     $FE    reply with data
301
FN_WRITE_M      EQU     $FD    reply with status (+/-)
302
FN_READ_RG      EQU     $FC    reply with registers
303
FN_WRITE_RG     EQU     $FB    reply with status
304
FN_RUN_TARG     EQU     $FA    reply (delayed) with registers
305
FN_SET_BYTE     EQU     $F9    reply with data (truncate if error)
306
FN_IN           EQU     $F8    input from port
307
FN_OUT          EQU     $F7    output to port
308
*
309
FN_MIN          EQU     $F7    MINIMUM RECOGNIZED FUNCTION CODE
310
FN_ERROR        EQU     $F0    error reply to unknown op-code
311
*
312
*===========================================================================
313
*  Common handler for default interrupt handlers
314
*  Enter with A=interrupt code = processor state
315
*  All registers stacked, PC=next instruction
316
INT_ENTRY
317
        STA     REG_STATE       SAVE STATE
318
*
319
*  Save registers from stack to reg block for return to master
320
*  Host wants least significant bytes first, so flip as necessary
321
        PULS    A
322
        STA     REG_CC          CONDITION CODES
323
        PULS    A
324
        STA     REG_A           A
325
        PULS    A
326
        STA     REG_B           B
327
        PULS    A
328
        STA     REG_DP          DP
329
        PULS    D
330
        STA     REG_X+1         MSB X
331
        STB     REG_X           LSB X
332
        PULS    D
333
        STA     REG_Y+1         MSB Y
334
        STB     REG_Y           LSB Y
335
        PULS    D
336
        STA     REG_U+1         MSB U
337
        STB     REG_U           LSB U
338
*
339
*  If this is a breakpoint (state = 1), then back up PC to point at SWI
340
        PULS    X               PC AFTER INTERRUPT
341
        LDA     REG_STATE
342
        CMPA    #1
343
        BNE     NOTBP           BR IF NOT A BREAKPOINT
344
        LEAX    -1,X            ELSE BACK UP TO POINT AT SWI LOCATION
345
NOTBP   TFR     X,D             TRANSFER PC TO D
346
        STA     REG_PC+1        MSB
347
        STB     REG_PC          LSB
348
        JMP     ENTER_MON       REG_PC POINTS AT POST-INTERRUPT OPCODE
349
*
350
*===========================================================================
351
*  Main loop  wait for command frame from master
352
*
353
*  Uses 6 bytes of stack including return address
354
*
355
MAIN    LDS     #MONSTACK               CLEAN STACK IS HAPPY STACK
356
        LDX     #COMBUF                 BUILD MESSAGE HERE
357
*
358
*  First byte is a function code
359
        JSR     GETCHAR                 GET A FUNCTION (6 bytes of stack)
360
        BCS     MAIN                    JIF TIMEOUT: RESYNC
361
        CMPA    #FN_MIN
362
        BLO     MAIN                    JIF BELOW MIN: ILLEGAL FUNCTION
363
        STA     ,X+                     SAVE FUNCTION CODE
364
*
365
*  Second byte is data byte count (may be zero)
366
        JSR     GETCHAR                 GET A LENGTH BYTE
367
        BCS     MAIN                    JIF TIMEOUT: RESYNC
368
        CMPA    #COMBUF_SIZE
369
        BHI     MAIN                    JIF TOO LONG: ILLEGAL LENGTH
370
        STA     ,X+                     SAVE LENGTH
371
        CMPA    #0
372
        BEQ     MA80                    SKIP DATA LOOP IF LENGTH = 0
373
*
374
*  Loop for data
375
        TFR     A,B                     SAVE LENGTH FOR LOOP
376
MA10    JSR     GETCHAR                 GET A DATA BYTE
377
        BCS     MAIN                    JIF TIMEOUT: RESYNC
378
        STA     ,X+                     SAVE DATA BYTE
379
        DECB
380
        BNE     MA10
381
*
382
*  Get the checksum
383
MA80    JSR     GETCHAR                 GET THE CHECKSUM
384
        BCS     MAIN                    JIF TIMEOUT: RESYNC
385
        PSHS    A                       SAVE CHECKSUM
386
*
387
*  Compare received checksum to that calculated on received buffer
388
*  (Sum should be 0)
389
        JSR     CHECKSUM
390
        ADDA    ,S+                     ADD SAVED CHECKSUM TO COMPUTED
391
        BNE     MAIN                    JIF BAD CHECKSUM
392
*
393
*  Process the message.
394
        LDX     #COMBUF
395
        LDA     ,X+                     GET THE FUNCTION CODE
396
        LDB     ,X+                     GET THE LENGTH
397
        CMPA    #FN_GET_STAT
398
        BEQ     TARGET_STAT
399
        CMPA    #FN_READ_MEM
400
        BEQ     JREAD_MEM
401
        CMPA    #FN_WRITE_M
402
        BEQ     JWRITE_MEM
403
        CMPA    #FN_READ_RG
404
        BEQ     JREAD_REGS
405
        CMPA    #FN_WRITE_RG
406
        BEQ     JWRITE_REGS
407
        CMPA    #FN_RUN_TARG
408
        BEQ     JRUN_TARGET
409
        CMPA    #FN_SET_BYTE
410
        BEQ     JSET_BYTES
411
        CMPA    #FN_IN
412
        BEQ     JIN_PORT
413
        CMPA    #FN_OUT
414
        BEQ     JOUT_PORT
415
*
416
*  Error: unknown function.  Complain
417
        LDA     #FN_ERROR
418
        STA     COMBUF          SET FUNCTION AS "ERROR"
419
        LDA     #1
420
        JMP     SEND_STATUS     VALUE IS "ERROR"
421
*
422
*  long jumps to handlers
423
JREAD_MEM       JMP     READ_MEM
424
JWRITE_MEM      JMP     WRITE_MEM
425
JREAD_REGS      JMP     READ_REGS
426
JWRITE_REGS     JMP     WRITE_REGS
427
JRUN_TARGET     JMP     RUN_TARGET
428
JSET_BYTES      JMP     SET_BYTES
429
JIN_PORT        JMP     IN_PORT
430
JOUT_PORT       JMP     OUT_PORT
431
 
432
*===========================================================================
433
*
434
*  Target Status:  FN, len
435
*
436
*  Entry with A=function code, B=data size, X=COMBUF+2
437
*
438
TARGET_STAT
439
        LDX     #TSTG                   DATA FOR REPLY
440
        LDY     #COMBUF+1               POINTER TO RETURN BUFFER
441
        LDB     #TSTG_SIZE              LENGTH OF REPLY
442
        STB     ,Y+                     SET SIZE IN REPLY BUFFER
443
TS10    LDA     ,X+                     MOVE REPLY DATA TO BUFFER
444
        STA     ,Y+
445
        DECB
446
        BNE     TS10
447
*
448
*  Compute checksum on buffer, and send to master, then return
449
        JMP     SEND
450
 
451
*===========================================================================
452
*
453
*  Read Memory:  FN, len, page, Alo, Ahi, Nbytes
454
*
455
*  Entry with A=function code, B=data size, X=COMBUF+2
456
*
457
READ_MEM
458
*
459
*  Set map
460
*;;;    LDA     0,X
461
*;;;    STA     MAPIMG
462
*;;;    STA     MAPREG
463
*
464
*  Get address
465
        LDA     2,X                     MSB OF ADDRESS IN A
466
        LDB     1,X                     LSB OF ADDRESS IN B
467
        TFR     D,Y                     ADDRESS IN Y
468
*
469
*  Prepare return buffer: FN (unchanged), LEN, DATA
470
        LDB     3,X                     NUMBER OF BYTES TO RETURN
471
        STB     COMBUF+1                RETURN LENGTH = REQUESTED DATA
472
        BEQ     GLP90                   JIF NO BYTES TO GET
473
*
474
*  Read the requested bytes from local memory
475
GLP     LDA     ,Y+                     GET BYTE
476
        STA     ,X+                     STORE TO RETURN BUFFER
477
        DECB
478
        BNE     GLP
479
*
480
*  Compute checksum on buffer, and send to master, then return
481
GLP90   JMP     SEND
482
 
483
*===========================================================================
484
*
485
*  Write Memory:  FN, len, page, Alo, Ahi, (len-3 bytes of Data)
486
*
487
*  Entry with A=function code, B=data size, X=COMBUF+2
488
*
489
*  Uses 6 bytes of stack
490
*
491
WRITE_MEM
492
*
493
*  Set map
494
        LDA     ,X+
495
*;;;    STA     MAPIMG
496
*;;;    STA     MAPREG
497
*
498
*  Get address
499
        LDB     ,X+                     LSB OF ADDRESS IN B
500
        LDA     ,X+                     MSB OF ADDRESS IN A
501
        TFR     D,Y                     ADDRESS IN Y
502
*
503
*  Compute number of bytes to write
504
        LDB     COMBUF+1                NUMBER OF BYTES TO RETURN
505
        SUBB    #3                      MINUS PAGE AND ADDRESS
506
        BEQ     WLP50                   JIF NO BYTES TO PUT
507
*
508
*  Write the specified bytes to local memory
509
        PSHS    B,X,Y
510
WLP     LDA     ,X+                     GET BYTE TO WRITE
511
        STA     ,Y+                     STORE THE BYTE AT ,Y
512
        DECB
513
        BNE     WLP
514
*
515
*  Compare to see if the write worked
516
        PULS    B,X,Y
517
WLP20   LDA     ,X+                     GET BYTE JUST WRITTEN
518
        CMPA    ,Y+
519
        BNE     WLP80                   BR IF WRITE FAILED
520
        DECB
521
        BNE     WLP20
522
*
523
*  Write succeeded:  return status = 0
524
WLP50   LDA     #0                      RETURN STATUS = 0
525
        BRA     WLP90
526
*
527
*  Write failed:  return status = 1
528
WLP80   LDA     #1
529
 
530
*  Return OK status
531
WLP90   JMP     SEND_STATUS
532
 
533
*===========================================================================
534
*
535
*  Read registers:  FN, len=0
536
*
537
*  Entry with A=function code, B=data size, X=COMBUF+2
538
*
539
READ_REGS
540
*
541
*  Enter here from SWI after "RUN" and "STEP" to return task registers
542
RETURN_REGS
543
        LDY     #TASK_REGS              POINTER TO REGISTERS
544
        LDB     #TASK_REG_SZ            NUMBER OF BYTES
545
        LDX     #COMBUF+1               POINTER TO RETURN BUFFER
546
        STB     ,X+                     SAVE RETURN DATA LENGTH
547
*
548
*  Copy the registers
549
GRLP    LDA     ,Y+                     GET BYTE TO A
550
        STA     ,X+                     STORE TO RETURN BUFFER
551
        DECB
552
        BNE     GRLP
553
*
554
*  Compute checksum on buffer, and send to master, then return
555
        JMP     SEND
556
 
557
*===========================================================================
558
*
559
*  Write registers:  FN, len, (register image)
560
*
561
*  Entry with A=function code, B=data size, X=COMBUF+2
562
*
563
WRITE_REGS
564
*
565
        TSTB                            NUMBER OF BYTES
566
        BEQ     WRR80                   JIF NO REGISTERS
567
*
568
*  Copy the registers
569
        LDY     #TASK_REGS              POINTER TO REGISTERS
570
WRRLP   LDA     ,X+                     GET BYTE TO A
571
        STA     ,Y+                     STORE TO REGISTER RAM
572
        DECB
573
        BNE     WRRLP
574
*
575
*  Return OK status
576
WRR80   CLRA
577
        JMP     SEND_STATUS
578
 
579
*===========================================================================
580
*
581
*  Run Target:  FN, len
582
*
583
*  Entry with A=function code, B=data size, X=COMBUF+2
584
*
585
RUN_TARGET
586
*
587
*  Restore user's map
588
**      LDA     REG_PAGE                USER'S PAGE
589
**      STA     MAPIMG                  SET IMAGE
590
**      STA     MAPREG                  SET MAPPING REGISTER
591
*
592
*  Switch to user stack
593
        LDA     REG_SP+1                BACK TO USER STACK
594
        LDB     REG_SP
595
        TFR     D,S                     TO S
596
*
597
*  Restore registers
598
        LDA     REG_PC+1                MS USER PC FOR RTI
599
        LDB     REG_PC                  LS USER PC FOR RTI
600
        PSHS    D
601
*
602
        LDA     REG_U+1
603
        LDB     REG_U
604
        PSHS    D
605
*
606
        LDA     REG_Y+1
607
        LDB     REG_Y
608
        PSHS    D
609
*
610
        LDA     REG_X+1
611
        LDB     REG_X
612
        PSHS    D
613
*
614
        LDA     REG_DP
615
        PSHS    A
616
*
617
        LDA     REG_B
618
        PSHS    A
619
*
620
        LDA     REG_A
621
        PSHS    A
622
*
623
        LDA     REG_CC                  SAVE USER CONDITION CODES FOR RTI
624
        ORA     #E                      _MUST_ BE "ALL REGS PUSHED"
625
        PSHS    A
626
*
627
*  Return to user
628
        RTI
629
*
630
*===========================================================================
631
*
632
*  Common continue point for all monitor entrances
633
*  SP = user stack
634
ENTER_MON
635
        TFR     S,D             USER STACK POINTER
636
        STA     REG_SP+1        SAVE USER'S STACK POINTER (MSB)
637
        STB     REG_SP          LSB
638
*
639
*  Change to our own stack
640
        LDS     #MONSTACK       AND USE OURS INSTEAD
641
*
642
*  Operating system variables
643
**      LDA     MAPIMG          GET CURRENT USER MAP
644
        LDA     #0              ... OR ZERO IF UNMAPPED TARGET
645
        STA     REG_PAGE        SAVE USER'S PAGE
646
*
647
*  Return registers to master
648
        JMP     RETURN_REGS
649
 
650
*===========================================================================
651
*
652
*  Set target byte(s):  FN, len { (page, alow, ahigh, data), (...)... }
653
*
654
*  Entry with A=function code, B=data size, X=COMBUF+2
655
*
656
*  Return has FN, len, (data from memory locations)
657
*
658
*  If error in insert (memory not writable), abort to return short data
659
*
660
*  This function is used primarily to set and clear breakpoints
661
*
662
*  Uses 1 byte of stack
663
*
664
SET_BYTES
665
        LDU     #COMBUF+1               POINTER TO RETURN BUFFER
666
        LDA     #0
667
        STA     ,U+                     SET RETURN COUNT AS ZERO
668
        LSRB
669
        LSRB                            LEN/4 = NUMBER OF BYTES TO SET
670
        BEQ     SB99                    JIF NO BYTES (COMBUF+1 = 0)
671
*
672
*  Loop on inserting bytes
673
SB10    PSHS    B                       SAVE LOOP COUNTER
674
*
675
*  Set map
676
*;;;    LDA     0,X
677
*;;;    STA     MAPIMG
678
*;;;    STA     MAPREG
679
*
680
*  Get address
681
        LDA     2,X                     MSB OF ADDRESS IN A
682
        LDB     1,X                     LSB OF ADDRESS IN B
683
        TFR     D,Y                     MEMORY ADDRESS IN Y
684
*
685
*  Read current data at byte location
686
        LDA     0,Y
687
*
688
*  Insert new data at byte location
689
        LDB     3,X                     GET BYTE TO STORE
690
        STB     0,Y                     WRITE TARGET MEMORY
691
*
692
*  Verify write
693
        CMPB    0,Y                     READ TARGET MEMORY
694
        PULS    B                       RESTORE LOOP COUNT, CC'S INTACT
695
        BNE     SB90                    BR IF INSERT FAILED: ABORT
696
*
697
*  Save target byte in return buffer
698
        STA     ,U+
699
        INC     COMBUF+1                COUNT ONE RETURN BYTE
700
*
701
*  Loop for next byte
702
        LEAX    4,X                     STEP TO NEXT BYTE SPECIFIER
703
        CMPB    COMBUF+1
704
        BNE     SB10                    *LOOP FOR ALL BYTES
705
*
706
*  Return buffer with data from byte locations
707
SB90
708
*
709
*  Compute checksum on buffer, and send to master, then return
710
SB99    JMP     SEND
711
 
712
*===========================================================================
713
*
714
*  Input from port:  FN, len, PortAddressLo, PAhi (=0)
715
*
716
*  While the 6809 has no input or output instructions, we retain these
717
*  to allow write-without-verify
718
*
719
*  Entry with A=function code, B=data size, X=COMBUF+2
720
*
721
IN_PORT
722
*
723
*  Get port address
724
        LDA     1,X                     MSB OF ADDRESS IN A
725
        LDB     0,X                     LSB OF ADDRESS IN B
726
        TFR     D,Y                     MEMORY ADDRESS IN Y
727
*
728
*  Read the requested byte from local memory
729
        LDA     0,Y
730
*
731
*  Return byte read as "status"
732
        JMP     SEND_STATUS
733
 
734
*===========================================================================
735
*
736
*  Output to port  FN, len, PortAddressLo, PAhi (=0), data
737
*
738
*  Entry with A=function code, B=data size, X=COMBUF+2
739
*
740
OUT_PORT
741
*
742
*  Get port address
743
        LDA     1,X                     MSB OF ADDRESS IN A
744
        LDB     0,X                     LSB OF ADDRESS IN B
745
        TFR     D,Y                     MEMORY ADDRESS IN Y
746
*
747
*  Get data
748
        LDA     2,X
749
*
750
*  Write value to port
751
        STA     0,Y
752
*
753
*  Do not read port to verify (some I/O devices don't like it)
754
*
755
*  Return status of OK
756
        CLRA
757
        JMP     SEND_STATUS
758
 
759
*===========================================================================
760
*  Build status return with value from "A"
761
*
762
SEND_STATUS
763
        STA     COMBUF+2                SET STATUS
764
        LDA     #1
765
        STA     COMBUF+1                SET LENGTH
766
        BRA     SEND
767
 
768
*===========================================================================
769
*  Append checksum to COMBUF and send to master
770
*
771
SEND    JSR     CHECKSUM                GET A=CHECKSUM, X->checksum location
772
        NEGA
773
        STA     0,X                     STORE NEGATIVE OF CHECKSUM
774
*
775
*  Send buffer to master
776
        LDX     #COMBUF                 POINTER TO DATA
777
        LDB     1,X                     LENGTH OF DATA
778
        ADDB    #3                      PLUS FUNCTION, LENGTH, CHECKSUM
779
SND10   LDA     ,X+
780
        JSR     PUTCHAR                 SEND A BYTE
781
        DECB
782
        BNE     SND10
783
        JMP     MAIN                    BACK TO MAIN LOOP
784
 
785
*===========================================================================
786
*  Compute checksum on COMBUF.  COMBUF+1 has length of data,
787
*  Also include function byte and length byte
788
*
789
*  Returns:
790
*       A = checksum
791
*       X = pointer to next byte in buffer (checksum location)
792
*       B is scratched
793
*
794
CHECKSUM
795
        LDX     #COMBUF                 pointer to buffer
796
        LDB     1,X                     length of message
797
        ADDB    #2                      plus function, length
798
        LDA     #0                      init checksum to 0
799
CHK10   ADDA    ,X+
800
        DECB
801
        BNE     CHK10                   loop for all
802
        RTS                             return with checksum in A
803
 
804
***********************************************************************
805
*
806
*  Interrupt handlers to catch unused interrupts and traps
807
*  Registers are stacked.  Jump through RAM vector using X, type in A
808
*
809
*  This will affect only interrupt routines looking for register values!
810
*
811
*  Our default handler uses the code in "A" as the processor state to be
812
*  passed back to the host.
813
*
814
RES_ENT     LDA     #7
815
            LDX     RAMVEC+0
816
            JMP     0,X
817
*
818
SWI3_ENT    LDA     #6
819
            LDX     RAMVEC+2
820
            JMP     0,X
821
*
822
SWI2_ENT    LDA     #5
823
            LDX     RAMVEC+4
824
            JMP     0,X
825
*
826
*  May have only PC and CC's pushed (unless we were waiting for an interrupt)
827
*  Push all registers here for common entry (else we can't use our RAM vector)
828
FIRQ_ENT    STA     REG_A       SAVE A REG
829
            PULS    A           GET CC'S FROM STACK
830
            BITA    #E
831
            BNE     FIRQ9       BR IF ALL REGISTERS PUSHED ALREADY
832
            PSHS    U,Y,X,DP,B  ELSE PUSH THEM NOW
833
            LDB     REG_A
834
            PSHS    B
835
            ORA     #E          SET AS "ALL REGS PUSHED"
836
FIRQ9       PSHS    A           REPLACE CC'S
837
            LDA     #4
838
            LDX     RAMVEC+6
839
            JMP     0,X
840
*
841
IRQ_ENT     LDA     #3
842
            LDX     RAMVEC+8
843
            JMP     0,X
844
*
845
NMI_ENT     LDA     #2
846
            LDX     RAMVEC+12
847
            JMP     0,X
848
*
849
SWI_ENT     LDA     #1
850
            JMP     INT_ENTRY
851
*
852
*============================================================================
853
*  VECTORS THROUGH RAM
854
        ORG     HARD_VECT
855
 
856
        FDB     RES_ENT                 fff0 (reserved)
857
        FDB     SWI3_ENT                fff2 (SWI3)
858
        FDB     SWI2_ENT                fff4 (SWI2)
859
        FDB     FIRQ_ENT                fff6 (FIRQ)
860
        FDB     IRQ_ENT                 fff8 (IRQ)
861
        FDB     SWI_ENT                 fffa (SWI/breakpoint)
862
        FDB     NMI_ENT                 fffc (NMI)
863
        FDB     RESET                   fffe reset
864
*
865
        END     RESET

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