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´╗┐AltOR32 Exception Vectors
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=========================
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AltOR32 exception vectors apart from reset are relative to the 'ISR_VECTOR' constant.
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The reset vector is relative to 'BOOT_VECTOR'.
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| Vector   | Priority | Description                    |
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|----------| ---------|--------------------------------|
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|  0x100   |    0     | Reset vector.                  |
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|  0x200   |    1     | Illegal instruction vector.    |
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|  0x300   |    5     | External interrupt vector.     |
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|  0x400   |    3     | Syscall instruction vector.    |
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|  0x500   |    -     | Unused vector.                 |
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|  0x600   |    3     | Trap vector.                   |
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|  0x700   |    4     | Non-maskable interrupt vector. |
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|  0x800   |    2     | Bus (address) error vector.    |
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### Exception Details
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##### Reset (0x100)
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On core reset (rst_i).
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`EPC = 0`
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`ESR = 0`
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`PC  = BOOT_VECTOR + 0x100`
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`SR  = 0`
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##### Illegal Instruction (0x200)
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Unsupported instruction executed.
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`EPC = FAULT_PC + 4`
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`ESR = SR`
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`PC = ISR_VECTOR + 0x200`
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`SR = 0`
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##### External Interrupt (0x300)
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External interrupt (intr_i) active whilst interrupts enabled (SR[IEE] == 1).
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`EPC = PC (Next instruction to execute after return).`
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`ESR = SR`
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`PC = ISR_VECTOR + 0x300`
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`SR = 0`
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##### SYSCALL Exception (0x400)
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On executing l.sys instruction.
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`EPC = NEXT_PC (instruction after l.sys).`
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`ESR = SR`
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`PC  = ISR_VECTOR + 0x400`
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`SR  = 0`
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##### Trap Exception (0x600)
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On executing l.trap instruction.
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`EPC = NEXT_PC (instruction after l.trap).`
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`ESR = SR`
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`PC  = ISR_VECTOR + 0x600`
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`SR  = 0`
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##### Non-maskable Interrupt (NMI) (0x700)
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Non-maskable interrupt (nmi_i) active. The non-maskable interrupt is latched internally so should not be asserted for longer than a single cycle.
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`EPC = PC (Next instruction to execute after return).`
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`ESR = SR`
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`PC  = ISR_VECTOR + 0x700`
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`SR  = 0`
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##### Bus Error Exception (0x800)
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Invalid PC (PC[1:0] != 0) or other erroneous memory access attempt.
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`EPC = FAULT_PC + 4`
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`ESR = SR`
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`PC  = ISR_VECTOR + 0x800`
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`SR  = 0`
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