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[/] [altor32/] [trunk/] [sw/] [gdb_stub/] [exception.inc] - Blame information for rev 43

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Line No. Rev Author Line
1 43 ultra_embe 
#-------------------------------------------------------------
2 
# Context Stack Frame - 140 bytes / 35 words
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#-------------------------------------------------------------
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#   0: R0
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#   4: R1 (SP)
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#   8: R2
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#  12: R3 (ARG0)
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#  16: R4
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#  20: R5
10 
#  24: R6
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#  28: R7
12 
#  32: R8
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#  36: R9 (LR)
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#  40: R10
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#  44: R11
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#  48: R12
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#  52: R13
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#  56: R14
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#  60: R15
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#  64: R16
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#  68: R17
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#  72: R18
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#  76: R19
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#  80: R20
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#  84: R21
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#  88: R22
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#  92: R23
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#  96: R24
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# 100: R25
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# 104: R26
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# 108: R27
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# 112: R28
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# 116: R29
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# 120: R30
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# 124: R31
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# 128: X
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# 132: EPC
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# 136: ESR
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#-------------------------------------------------------------
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#-------------------------------------------------------------
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# asm_save_context:
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#-------------------------------------------------------------
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.macro asm_save_context
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    l.nop
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    l.nop
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    # Adjust SP (frame size is 140 + allow for 128 uncommitted in-use stack)
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    l.addi  r1, r1, -268
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    # Save register file to stack
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    l.sw 124(r1), r31
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    l.sw 120(r1), r30
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    l.sw 116(r1), r29
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    l.sw 112(r1), r28
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    l.sw 108(r1), r27
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    l.sw 104(r1), r26
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    l.sw 100(r1), r25
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    l.sw 96(r1),  r24
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    l.sw 92(r1),  r23
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    l.sw 88(r1),  r22
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    l.sw 84(r1),  r21
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    l.sw 80(r1),  r20
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    l.sw 76(r1),  r19
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    l.sw 72(r1),  r18
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    l.sw 68(r1),  r17
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    l.sw 64(r1),  r16
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    l.sw 60(r1),  r15
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    l.sw 56(r1),  r14
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    l.sw 52(r1),  r13
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    l.sw 48(r1),  r12
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    l.sw 44(r1),  r11
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    l.sw 40(r1),  r10
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    l.sw 36(r1),  r9
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    l.sw 32(r1),  r8
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    l.sw 28(r1),  r7
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    l.sw 24(r1),  r6
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    l.sw 20(r1),  r5
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    l.sw 16(r1),  r4
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    l.sw 12(r1),  r3
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    l.sw 8(r1),   r2
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    l.sw 0(r1),   r0
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    # R10 = EPC
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    l.mfspr r10, r0, 32
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    l.sw 132(r1),  r10
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    # R10 = ESR
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    l.mfspr r10, r0, 64
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    l.sw 136(r1),  r10
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    # Stack pointer (R1)
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    l.or   r10, r0,  r1
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    l.addi r10, r10, +268
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    l.sw 4(r1), r10
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.endm
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#-------------------------------------------------------------
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# asm_load_context:
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#-------------------------------------------------------------
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.macro asm_load_context
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    # Restore EPC (PC of non-exception code)
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    l.lwz r10, 132(r1)
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    # EPC = R10
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    l.mtspr r0,r10,32
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    # Restore ESR (SR of non-exception code)
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    l.lwz r10, 136(r1)
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    # ESR = R10
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    l.mtspr r0,r10,64
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    # Restore register set
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    # r1/r1 already set
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    l.lwz r2,   8(r1)
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    l.lwz r3,  12(r1)
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    l.lwz r4,  16(r1)
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    l.lwz r5,  20(r1)
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    l.lwz r6,  24(r1)
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    l.lwz r7,  28(r1)
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    l.lwz r8,  32(r1)
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    l.lwz r9,  36(r1)
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    l.lwz r10, 40(r1)
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    l.lwz r11, 44(r1)
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    l.lwz r12, 48(r1)
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    l.lwz r13, 52(r1)
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    l.lwz r14, 56(r1)
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    l.lwz r15, 60(r1)
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    l.lwz r16, 64(r1)
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    l.lwz r17, 68(r1)
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    l.lwz r18, 72(r1)
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    l.lwz r19, 76(r1)
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    l.lwz r20, 80(r1)
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    l.lwz r21, 84(r1)
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    l.lwz r22, 88(r1)
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    l.lwz r23, 92(r1)
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    l.lwz r24, 96(r1)
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    l.lwz r25,100(r1)
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    l.lwz r26,104(r1)
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    l.lwz r27,108(r1)
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    l.lwz r28,112(r1)
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    l.lwz r29,116(r1)
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    l.lwz r30,120(r1)
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    l.lwz r31,124(r1)
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    # Adjust SP past register set
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    l.addi  r1, r1, +268
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    # Return from interrupt (to restore PC & SR)
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    l.rfe
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    l.nop
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.endm

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