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ultra_embe |
//-----------------------------------------------------------------
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// AltOR32
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// Alternative Lightweight OpenRisc
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// V2.0
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// Ultra-Embedded.com
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// Copyright 2011 - 2014
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//
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// Email: admin@ultra-embedded.com
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//
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// License: LGPL
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//-----------------------------------------------------------------
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//
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// Copyright (C) 2011 - 2014 Ultra-Embedded.com
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//
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// This source file may be used and distributed without
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// restriction provided that this copyright statement is not
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// removed from the file and that any derivative work contains
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// the original copyright notice and the associated disclaimer.
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//
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// This source file is free software; you can redistribute it
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// and/or modify it under the terms of the GNU Lesser General
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// Public License as published by the Free Software Foundation;
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// either version 2.1 of the License, or (at your option) any
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// later version.
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//
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// This source is distributed in the hope that it will be
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// useful, but WITHOUT ANY WARRANTY; without even the implied
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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// PURPOSE. See the GNU Lesser General Public License for more
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// details.
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//
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// You should have received a copy of the GNU Lesser General
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// Public License along with this source; if not, write to the
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// Free Software Foundation, Inc., 59 Temple Place, Suite 330,
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// Boston, MA 02111-1307 USA
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//-----------------------------------------------------------------
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#include "mem_map.h"
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#include "gdb_hw.h"
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//-----------------------------------------------------------------
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// Defines:
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//-----------------------------------------------------------------
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#define UART_RX_AVAIL (1<<0)
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#define UART_TX_AVAIL (1<<1)
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#define UART_RX_FULL (1<<2)
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#define UART_TX_BUSY (1<<3)
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#define UART_RX_ERROR (1<<4)
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// SR Register
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#define SPR_SR (17)
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#define SPR_SR_ICACHE_FLUSH (1 << 17)
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#define SPR_SR_DCACHE_FLUSH (1 << 18)
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#define MAX_RX_BUF 128
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static char _rx_buf[MAX_RX_BUF];
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static int _rx_head;
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static int _rx_tail;
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//-----------------------------------------------------------------
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// mfspr: Read from SPR
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//-----------------------------------------------------------------
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static inline unsigned long mfspr(unsigned long spr)
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{
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unsigned long value;
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asm volatile ("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
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return value;
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}
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//-----------------------------------------------------------------
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// mtspr: Write to SPR
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//-----------------------------------------------------------------
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static inline void mtspr(unsigned long spr, unsigned long value)
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{
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asm volatile ("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
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}
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//-----------------------------------------------------------------
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// gdb_pollrx:
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//-----------------------------------------------------------------
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void gdb_pollrx (void)
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{
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if (UART_USR & UART_RX_AVAIL)
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{
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_rx_buf[_rx_tail] = UART_UDR;
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if (++_rx_tail == MAX_RX_BUF)
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_rx_tail = 0;
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}
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}
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//-----------------------------------------------------------------
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// gdb_putchar:
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//-----------------------------------------------------------------
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void gdb_putchar (char c)
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{
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UART_UDR = c;
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while (UART_USR & UART_TX_BUSY)
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gdb_pollrx();
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}
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//-------------------------------------------------------------
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// gdb_putstr:
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//-------------------------------------------------------------
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void gdb_putstr(const char *str)
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{
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while (*str)
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gdb_putchar(*str++);
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}
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//-----------------------------------------------------------------
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// gdb_getchar:
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//-----------------------------------------------------------------
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int gdb_getchar (void)
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{
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int ch = -1;
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do
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{
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gdb_pollrx();
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if (_rx_head != _rx_tail)
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{
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ch = _rx_buf[_rx_head];
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if (++_rx_head == MAX_RX_BUF)
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_rx_head = 0;
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break;
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}
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}
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while (1);
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return ch;
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}
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//-----------------------------------------------------------------
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// gdb_flush_cache:
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//-----------------------------------------------------------------
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void gdb_flush_cache(void)
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{
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_ICACHE_FLUSH | SPR_SR_DCACHE_FLUSH);
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}
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