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/******************************************************************************
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* *
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* License Agreement *
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* *
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* Copyright (c) 2003-2005 Altera Corporation, San Jose, California, USA. *
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* All rights reserved. *
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* *
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* Permission is hereby granted, free of charge, to any person obtaining a *
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* copy of this software and associated documentation files (the "Software"), *
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* to deal in the Software without restriction, including without limitation *
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* the rights to use, copy, modify, merge, publish, distribute, sublicense, *
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* and/or sell copies of the Software, and to permit persons to whom the *
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* Software is furnished to do so, subject to the following conditions: *
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* *
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* The above copyright notice and this permission notice shall be included in *
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* all copies or substantial portions of the Software. *
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* *
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER *
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING *
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER *
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* DEALINGS IN THE SOFTWARE. *
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* *
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* This agreement shall be governed in all respects by the laws of the State *
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* of California and by the laws of the United States of America. *
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* *
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******************************************************************************/
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/*
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* This is the software multiply/divide handler for Nios2.
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*/
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/*
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* Provide a label which can be used to pull this file in.
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*/
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.section .exceptions.start
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.globl alt_exception_muldiv
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alt_exception_muldiv:
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/*
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* Pull in the entry/exit code.
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*/
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.globl alt_exception
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.section .exceptions.soft, "xa"
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/* INSTRUCTION EMULATION
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* ---------------------
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*
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* Nios II processors generate exceptions for unimplemented instructions.
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* The routines below emulate these instructions. Depending on the
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* processor core, the only instructions that might need to be emulated
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* are div, divu, mul, muli, mulxss, mulxsu, and mulxuu.
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*
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* The emulations match the instructions, except for the following
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* limitations:
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*
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* 1) The emulation routines do not emulate the use of the exception
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* temporary register (et) as a source operand because the exception
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* handler already has modified it.
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*
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* 2) The routines do not emulate the use of the stack pointer (sp) or the
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* exception return address register (ea) as a destination because
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* modifying these registers crashes the exception handler or the
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* interrupted routine.
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*
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* 3) To save code size, the routines do not emulate the use of the
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* breakpoint registers (ba and bt) as operands.
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*
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* Detailed Design
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* ---------------
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*
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* The emulation routines expect the contents of integer registers r0-r31
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* to be on the stack at addresses sp, 4(sp), 8(sp), ... 124(sp). The
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* routines retrieve source operands from the stack and modify the
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* destination register's value on the stack prior to the end of the
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* exception handler. Then all registers except the destination register
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* are restored to their previous values.
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*
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* The instruction that causes the exception is found at address -4(ea).
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* The instruction's OP and OPX fields identify the operation to be
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* performed.
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*
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* One instruction, muli, is an I-type instruction that is identified by
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* an OP field of 0x24.
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*
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* muli AAAAA,BBBBB,IIIIIIIIIIIIIIII,-0x24-
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* 27 22 6 0 <-- LSB of field
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*
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* The remaining emulated instructions are R-type and have an OP field
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* of 0x3a. Their OPX fields identify them.
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*
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* R-type AAAAA,BBBBB,CCCCC,XXXXXX,NNNNN,-0x3a-
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* 27 22 17 11 6 0 <-- LSB of field
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*
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*
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*/
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/*
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* Split the instruction into its fields. We need 4*A, 4*B, and 4*C as
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* offsets to the stack pointer for access to the stored register values.
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*/
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/* r2 = AAAAA,BBBBB,IIIIIIIIIIIIIIII,PPPPPP */
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roli r3, r2, 7 /* r3 = BBB,IIIIIIIIIIIIIIII,PPPPPP,AAAAA,BB */
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roli r4, r3, 3 /* r4 = IIIIIIIIIIIIIIII,PPPPPP,AAAAA,BBBBB */
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roli r6, r4, 2 /* r6 = IIIIIIIIIIIIII,PPPPPP,AAAAA,BBBBB,II */
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srai r4, r4, 16 /* r4 = (sign-extended) IMM16 */
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xori r6, r6, 0x42 /* r6 = CCC,XXXXXX,NNNNN,PPPPPP,AAAAA,bBBBB,cC */
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roli r7, r6, 5 /* r7 = XXXX,NNNNN,PPPPPP,AAAAA,bBBBB,cCCCC,XX */
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andi r5, r2, 0x3f /* r5 = 00000000000000000000000000,PPPPPP */
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xori r3, r3, 0x40
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andi r3, r3, 0x7c /* r3 = 0000000000000000000000000,aAAAA,00 */
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andi r6, r6, 0x7c /* r6 = 0000000000000000000000000,bBBBB,00 */
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andi r7, r7, 0x7c /* r7 = 0000000000000000000000000,cCCCC,00 */
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/* Now either
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* r5 = OP
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* r3 = 4*(A^16)
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* r4 = IMM16 (sign extended)
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* r6 = 4*(B^16)
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* r7 = 4*(C^16)
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* or
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* r5 = OP
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*/
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/*
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* Save everything on the stack to make it easy for the emulation routines
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* to retrieve the source register operands. The exception entry code has
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* already saved some of this so we don't need to do it all again.
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*/
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addi sp, sp, -60
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stw zero, 64(sp) /* Save zero on stack to avoid special case for r0. */
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/* Register at and r2-r15 have already been saved. */
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stw r16, 0(sp)
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stw r17, 4(sp)
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stw r18, 8(sp)
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stw r19, 12(sp)
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stw r20, 16(sp)
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stw r21, 20(sp)
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stw r22, 24(sp)
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stw r23, 28(sp)
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/* et @ 32 - Has already been changed.*/
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/* bt @ 36 - Usually isn't an operand. */
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stw gp, 40(sp)
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stw sp, 44(sp)
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stw fp, 48(sp)
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/* ea @ 52 - Don't bother to save - it's already been changed */
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/* ba @ 56 - Breakpoint register usually isn't an operand */
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/* ra @ 60 - Has already been saved */
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/*
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* Prepare for either multiplication or division loop.
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* They both loop 32 times.
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*/
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movi r14, 32
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/*
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* Get the operands.
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*
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* It is necessary to check for muli because it uses an I-type instruction
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* format, while the other instructions are have an R-type format.
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*/
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add r3, r3, sp /* r3 = address of A-operand. */
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ldw r3, 0(r3) /* r3 = A-operand. */
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movi r15, 0x24 /* muli opcode (I-type instruction format) */
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beq r5, r15, .Lmul_immed /* muli doesn't use the B register as a source */
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add r6, r6, sp /* r6 = address of B-operand. */
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ldw r6, 0(r6) /* r6 = B-operand. */
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/* r4 = SSSSSSSSSSSSSSSS,-----IMM16------ */
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/* IMM16 not needed, align OPX portion */
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/* r4 = SSSSSSSSSSSSSSSS,CCCCC,-OPX--,00000 */
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srli r4, r4, 5 /* r4 = 00000,SSSSSSSSSSSSSSSS,CCCCC,-OPX-- */
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andi r4, r4, 0x3f /* r4 = 00000000000000000000000000,-OPX-- */
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/* Now
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* r5 = OP
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* r3 = src1
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* r6 = src2
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* r4 = OPX (no longer can be muli)
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* r7 = 4*(C^16)
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* r14 = loop counter
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*/
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/* ILLEGAL-INSTRUCTION EXCEPTION
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* -----------------------------
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*
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* This code is for Nios II cores that generate exceptions when attempting
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* to execute illegal instructions. Nios II cores that support an
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* illegal-instruction exception are identified by the presence of the
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* macro definition NIOS2_HAS_ILLEGAL_INSTRUCTION_EXCEPTION in system.h .
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*
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* Remember that illegal instructions are different than unimplemented
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* instructions. Illegal instructions are instruction encodings that
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* have not been defined by the Nios II ISA. Unimplemented instructions
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* are legal instructions that must be emulated by some Nios II cores.
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*
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* If we get here, all instructions except multiplies and divides
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* are illegal.
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*
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* This code assumes that OP is not muli (because muli was tested above).
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* All other multiplies and divides are legal. Anything else is illegal.
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*/
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movi r8, 0x3a /* OP for R-type mul* and div* */
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bne r5, r8, .Lnot_muldiv
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/* r15 already is 0x24 */ /* OPX of divu */
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beq r4, r15, .Ldivide
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movi r15,0x27 /* OPX of mul */
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beq r4, r15, .Lmultiply
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movi r15,0x07 /* OPX of mulxuu */
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beq r4, r15, .Lmultiply
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movi r15,0x17 /* OPX of mulxsu */
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beq r4, r15, .Lmultiply
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movi r15,0x1f /* OPX of mulxss */
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beq r4, r15, .Lmultiply
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movi r15,0x25 /* OPX of div */
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bne r4, r15, .Lnot_muldiv
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/* DIVISION
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*
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* Divide an unsigned dividend by an unsigned divisor using
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* a shift-and-subtract algorithm. The example below shows
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* 43 div 7 = 6 for 8-bit integers. This classic algorithm uses a
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* single register to store both the dividend and the quotient,
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* allowing both values to be shifted with a single instruction.
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*
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* remainder dividend:quotient
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* --------- -----------------
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* initialize 00000000 00101011:
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* shift 00000000 0101011:_
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* remainder >= divisor? no 00000000 0101011:0
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* shift 00000000 101011:0_
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* remainder >= divisor? no 00000000 101011:00
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* shift 00000001 01011:00_
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* remainder >= divisor? no 00000001 01011:000
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* shift 00000010 1011:000_
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* remainder >= divisor? no 00000010 1011:0000
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* shift 00000101 011:0000_
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* remainder >= divisor? no 00000101 011:00000
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* shift 00001010 11:00000_
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* remainder >= divisor? yes 00001010 11:000001
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* remainder -= divisor - 00000111
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* ----------
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* 00000011 11:000001
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* shift 00000111 1:000001_
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* remainder >= divisor? yes 00000111 1:0000011
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* remainder -= divisor - 00000111
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* ----------
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* 00000000 1:0000011
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* shift 00000001 :0000011_
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* remainder >= divisor? no 00000001 :00000110
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*
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* The quotient is 00000110.
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*/
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.Ldivide:
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/*
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* Prepare for division by assuming the result
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* is unsigned, and storing its "sign" as 0.
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*/
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movi r17, 0
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/* Which division opcode? */
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xori r15, r4, 0x25 /* OPX of div */
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bne r15, zero, .Lunsigned_division
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/*
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* OPX is div. Determine and store the sign of the quotient.
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* Then take the absolute value of both operands.
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*/
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xor r17, r3, r6 /* MSB contains sign of quotient */
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bge r3, zero, 0f
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sub r3, zero, r3 /* -r3 */
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0:
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bge r6, zero, 0f
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sub r6, zero, r6 /* -r6 */
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0:
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.Lunsigned_division:
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/* Initialize the unsigned-division loop. */
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movi r13, 0 /* remainder = 0 */
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/* Now
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* r3 = dividend : quotient
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* r4 = 0x25 for div, 0x24 for divu
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* r6 = divisor
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* r13 = remainder
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* r14 = loop counter (already initialized to 32)
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* r17 = MSB contains sign of quotient
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*/
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/*
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* for (count = 32; count > 0; --count)
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* {
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*/
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.Ldivide_loop:
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/*
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* Division:
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*
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| 324 |
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* (remainder:dividend:quotient) <<= 1;
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*/
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slli r13, r13, 1
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cmplt r15, r3, zero /* r15 = MSB of r3 */
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or r13, r13, r15
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slli r3, r3, 1
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/*
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| 333 |
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* if (remainder >= divisor)
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| 334 |
|
|
* {
|
| 335 |
|
|
* set LSB of quotient
|
| 336 |
|
|
* remainder -= divisor;
|
| 337 |
|
|
* }
|
| 338 |
|
|
*/
|
| 339 |
|
|
bltu r13, r6, .Ldiv_skip
|
| 340 |
|
|
ori r3, r3, 1
|
| 341 |
|
|
sub r13, r13, r6
|
| 342 |
|
|
.Ldiv_skip:
|
| 343 |
|
|
|
| 344 |
|
|
/*
|
| 345 |
|
|
* }
|
| 346 |
|
|
*/
|
| 347 |
|
|
subi r14, r14, 1
|
| 348 |
|
|
bne r14, zero, .Ldivide_loop
|
| 349 |
|
|
|
| 350 |
|
|
mov r9, r3
|
| 351 |
|
|
|
| 352 |
|
|
|
| 353 |
|
|
/* Now
|
| 354 |
|
|
* r9 = quotient
|
| 355 |
|
|
* r4 = 0x25 for div, 0x24 for divu
|
| 356 |
|
|
* r7 = 4*(C^16)
|
| 357 |
|
|
* r17 = MSB contains sign of quotient
|
| 358 |
|
|
*/
|
| 359 |
|
|
|
| 360 |
|
|
|
| 361 |
|
|
/*
|
| 362 |
|
|
* Conditionally negate signed quotient. If quotient is unsigned,
|
| 363 |
|
|
* the sign already is initialized to 0.
|
| 364 |
|
|
*/
|
| 365 |
|
|
bge r17, zero, .Lstore_result
|
| 366 |
|
|
sub r9, zero, r9 /* -r9 */
|
| 367 |
|
|
|
| 368 |
|
|
br .Lstore_result
|
| 369 |
|
|
|
| 370 |
|
|
|
| 371 |
|
|
|
| 372 |
|
|
|
| 373 |
|
|
/* MULTIPLICATION
|
| 374 |
|
|
*
|
| 375 |
|
|
* A "product" is the number that one gets by summing a "multiplicand"
|
| 376 |
|
|
* several times. The "multiplier" specifies the number of copies of the
|
| 377 |
|
|
* multiplicand that are summed.
|
| 378 |
|
|
*
|
| 379 |
|
|
* Actual multiplication algorithms don't use repeated addition, however.
|
| 380 |
|
|
* Shift-and-add algorithms get the same answer as repeated addition, and
|
| 381 |
|
|
* they are faster. To compute the lower half of a product (pppp below)
|
| 382 |
|
|
* one shifts the product left before adding in each of the partial products
|
| 383 |
|
|
* (a * mmmm) through (d * mmmm).
|
| 384 |
|
|
*
|
| 385 |
|
|
* To compute the upper half of a product (PPPP below), one adds in the
|
| 386 |
|
|
* partial products (d * mmmm) through (a * mmmm), each time following the
|
| 387 |
|
|
* add by a right shift of the product.
|
| 388 |
|
|
*
|
| 389 |
|
|
* mmmm
|
| 390 |
|
|
* * abcd
|
| 391 |
|
|
* ------
|
| 392 |
|
|
* #### = d * mmmm
|
| 393 |
|
|
* #### = c * mmmm
|
| 394 |
|
|
* #### = b * mmmm
|
| 395 |
|
|
* #### = a * mmmm
|
| 396 |
|
|
* --------
|
| 397 |
|
|
* PPPPpppp
|
| 398 |
|
|
*
|
| 399 |
|
|
* The example above shows 4 partial products. Computing actual Nios II
|
| 400 |
|
|
* products requires 32 partials.
|
| 401 |
|
|
*
|
| 402 |
|
|
* It is possible to compute the result of mulxsu from the result of mulxuu
|
| 403 |
|
|
* because the only difference between the results of these two opcodes is
|
| 404 |
|
|
* the value of the partial product associated with the sign bit of rA.
|
| 405 |
|
|
*
|
| 406 |
|
|
* mulxsu = mulxuu - ((rA < 0) ? rB : 0);
|
| 407 |
|
|
*
|
| 408 |
|
|
* It is possible to compute the result of mulxss from the result of mulxsu
|
| 409 |
|
|
* because the only difference between the results of these two opcodes is
|
| 410 |
|
|
* the value of the partial product associated with the sign bit of rB.
|
| 411 |
|
|
*
|
| 412 |
|
|
* mulxss = mulxsu - ((rB < 0) ? rA : 0);
|
| 413 |
|
|
*
|
| 414 |
|
|
*/
|
| 415 |
|
|
|
| 416 |
|
|
.Lmul_immed:
|
| 417 |
|
|
/* Opcode is muli. Change it into mul for remainder of algorithm. */
|
| 418 |
|
|
mov r7, r6 /* Field B is dest register, not field C. */
|
| 419 |
|
|
mov r6, r4 /* Field IMM16 is src2, not field B. */
|
| 420 |
|
|
movi r4, 0x27 /* OPX of mul is 0x27 */
|
| 421 |
|
|
|
| 422 |
|
|
.Lmultiply:
|
| 423 |
|
|
/* Initialize the multiplication loop. */
|
| 424 |
|
|
movi r9, 0 /* mul_product = 0 */
|
| 425 |
|
|
movi r10, 0 /* mulxuu_product = 0 */
|
| 426 |
|
|
mov r11, r6 /* save original multiplier for mulxsu and mulxss */
|
| 427 |
|
|
mov r12, r6 /* mulxuu_multiplier (will be shifted) */
|
| 428 |
|
|
movi r16, 1 /* used to create "rori B,A,1" from "ror B,A,r16" */
|
| 429 |
|
|
|
| 430 |
|
|
/* Now
|
| 431 |
|
|
* r3 = multiplicand
|
| 432 |
|
|
* r6 = mul_multiplier
|
| 433 |
|
|
* r7 = 4 * dest_register (used later as offset to sp)
|
| 434 |
|
|
* r9 = mul_product
|
| 435 |
|
|
* r10 = mulxuu_product
|
| 436 |
|
|
* r11 = original multiplier
|
| 437 |
|
|
* r12 = mulxuu_multiplier
|
| 438 |
|
|
* r14 = loop counter (already initialized)
|
| 439 |
|
|
* r15 = temp
|
| 440 |
|
|
* r16 = 1
|
| 441 |
|
|
*/
|
| 442 |
|
|
|
| 443 |
|
|
|
| 444 |
|
|
/*
|
| 445 |
|
|
* for (count = 32; count > 0; --count)
|
| 446 |
|
|
* {
|
| 447 |
|
|
*/
|
| 448 |
|
|
.Lmultiply_loop:
|
| 449 |
|
|
|
| 450 |
|
|
/*
|
| 451 |
|
|
* mul_product <<= 1;
|
| 452 |
|
|
* lsb = multiplier & 1;
|
| 453 |
|
|
*/
|
| 454 |
|
|
slli r9, r9, 1
|
| 455 |
|
|
andi r15, r12, 1
|
| 456 |
|
|
|
| 457 |
|
|
/*
|
| 458 |
|
|
* if (lsb == 1)
|
| 459 |
|
|
* {
|
| 460 |
|
|
* mulxuu_product += multiplicand;
|
| 461 |
|
|
* }
|
| 462 |
|
|
*/
|
| 463 |
|
|
beq r15, zero, .Lmulx_skip
|
| 464 |
|
|
add r10, r10, r3
|
| 465 |
|
|
cmpltu r15, r10, r3 /* Save the carry from the MSB of mulxuu_product. */
|
| 466 |
|
|
ror r15, r15, r16 /* r15 = 0x80000000 on carry, or else 0x00000000 */
|
| 467 |
|
|
.Lmulx_skip:
|
| 468 |
|
|
|
| 469 |
|
|
/*
|
| 470 |
|
|
* if (MSB of mul_multiplier == 1)
|
| 471 |
|
|
* {
|
| 472 |
|
|
* mul_product += multiplicand;
|
| 473 |
|
|
* }
|
| 474 |
|
|
*/
|
| 475 |
|
|
bge r6, zero, .Lmul_skip
|
| 476 |
|
|
add r9, r9, r3
|
| 477 |
|
|
.Lmul_skip:
|
| 478 |
|
|
|
| 479 |
|
|
/*
|
| 480 |
|
|
* mulxuu_product >>= 1; logical shift
|
| 481 |
|
|
* mul_multiplier <<= 1; done with MSB
|
| 482 |
|
|
* mulx_multiplier >>= 1; done with LSB
|
| 483 |
|
|
*/
|
| 484 |
|
|
srli r10, r10, 1
|
| 485 |
|
|
or r10, r10, r15 /* OR in the saved carry bit. */
|
| 486 |
|
|
slli r6, r6, 1
|
| 487 |
|
|
srli r12, r12, 1
|
| 488 |
|
|
|
| 489 |
|
|
|
| 490 |
|
|
/*
|
| 491 |
|
|
* }
|
| 492 |
|
|
*/
|
| 493 |
|
|
subi r14, r14, 1
|
| 494 |
|
|
bne r14, zero, .Lmultiply_loop
|
| 495 |
|
|
|
| 496 |
|
|
|
| 497 |
|
|
/*
|
| 498 |
|
|
* Multiply emulation loop done.
|
| 499 |
|
|
*/
|
| 500 |
|
|
|
| 501 |
|
|
/* Now
|
| 502 |
|
|
* r3 = multiplicand
|
| 503 |
|
|
* r4 = OPX
|
| 504 |
|
|
* r7 = 4 * dest_register (used later as offset to sp)
|
| 505 |
|
|
* r9 = mul_product
|
| 506 |
|
|
* r10 = mulxuu_product
|
| 507 |
|
|
* r11 = original multiplier
|
| 508 |
|
|
* r15 = temp
|
| 509 |
|
|
*/
|
| 510 |
|
|
|
| 511 |
|
|
|
| 512 |
|
|
/*
|
| 513 |
|
|
* Select/compute the result based on OPX.
|
| 514 |
|
|
*/
|
| 515 |
|
|
|
| 516 |
|
|
|
| 517 |
|
|
/* OPX == mul? Then store. */
|
| 518 |
|
|
xori r15, r4, 0x27
|
| 519 |
|
|
beq r15, zero, .Lstore_result
|
| 520 |
|
|
|
| 521 |
|
|
/* It's one of the mulx.. opcodes. Move over the result. */
|
| 522 |
|
|
mov r9, r10
|
| 523 |
|
|
|
| 524 |
|
|
/* OPX == mulxuu? Then store. */
|
| 525 |
|
|
xori r15, r4, 0x07
|
| 526 |
|
|
beq r15, zero, .Lstore_result
|
| 527 |
|
|
|
| 528 |
|
|
/* Compute mulxsu
|
| 529 |
|
|
*
|
| 530 |
|
|
* mulxsu = mulxuu - ((rA < 0) ? rB : 0);
|
| 531 |
|
|
*/
|
| 532 |
|
|
bge r3, zero, .Lmulxsu_skip
|
| 533 |
|
|
sub r9, r9, r11
|
| 534 |
|
|
.Lmulxsu_skip:
|
| 535 |
|
|
|
| 536 |
|
|
/* OPX == mulxsu? Then store. */
|
| 537 |
|
|
xori r15, r4, 0x17
|
| 538 |
|
|
beq r15, zero, .Lstore_result
|
| 539 |
|
|
|
| 540 |
|
|
/* Compute mulxss
|
| 541 |
|
|
*
|
| 542 |
|
|
* mulxss = mulxsu - ((rB < 0) ? rA : 0);
|
| 543 |
|
|
*/
|
| 544 |
|
|
bge r11, zero, .Lmulxss_skip
|
| 545 |
|
|
sub r9, r9, r3
|
| 546 |
|
|
.Lmulxss_skip:
|
| 547 |
|
|
/* At this point, assume that OPX is mulxss, so store */
|
| 548 |
|
|
|
| 549 |
|
|
|
| 550 |
|
|
.Lstore_result:
|
| 551 |
|
|
add r7, r7, sp
|
| 552 |
|
|
stw r9, 0(r7)
|
| 553 |
|
|
|
| 554 |
|
|
ldw r16, 0(sp)
|
| 555 |
|
|
ldw r17, 4(sp)
|
| 556 |
|
|
ldw r18, 8(sp)
|
| 557 |
|
|
ldw r19, 12(sp)
|
| 558 |
|
|
ldw r20, 16(sp)
|
| 559 |
|
|
ldw r21, 20(sp)
|
| 560 |
|
|
ldw r22, 24(sp)
|
| 561 |
|
|
ldw r23, 28(sp)
|
| 562 |
|
|
|
| 563 |
|
|
/* bt @ 32 - Breakpoint register usually isn't an operand. */
|
| 564 |
|
|
/* et @ 36 - Don't corrupt et. */
|
| 565 |
|
|
/* gp @ 40 - Don't corrupt gp. */
|
| 566 |
|
|
/* sp @ 44 - Don't corrupt sp. */
|
| 567 |
|
|
ldw fp, 48(sp)
|
| 568 |
|
|
/* ea @ 52 - Don't corrupt ea. */
|
| 569 |
|
|
/* ba @ 56 - Breakpoint register usually isn't an operand. */
|
| 570 |
|
|
|
| 571 |
|
|
addi sp, sp, 60
|
| 572 |
|
|
|
| 573 |
|
|
br .Lexception_exit
|
| 574 |
|
|
|
| 575 |
|
|
|
| 576 |
|
|
.Lnot_muldiv:
|
| 577 |
|
|
|
| 578 |
|
|
addi sp, sp, 60
|
| 579 |
|
|
|
| 580 |
|
|
|
| 581 |
|
|
.section .exceptions.exit.label
|
| 582 |
|
|
.Lexception_exit:
|
| 583 |
|
|
|
