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1 8 alfik
/******************************************************************************
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*                                                                             *
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* License Agreement                                                           *
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*                                                                             *
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* Copyright (c) 2008 Altera Corporation, San Jose, California, USA.           *
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* All rights reserved.                                                        *
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*                                                                             *
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* Permission is hereby granted, free of charge, to any person obtaining a     *
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* copy of this software and associated documentation files (the "Software"),  *
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* to deal in the Software without restriction, including without limitation   *
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,    *
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* and/or sell copies of the Software, and to permit persons to whom the       *
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* Software is furnished to do so, subject to the following conditions:        *
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*                                                                             *
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* The above copyright notice and this permission notice shall be included in  *
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* all copies or substantial portions of the Software.                         *
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*                                                                             *
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
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* DEALINGS IN THE SOFTWARE.                                                   *
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*                                                                             *
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* This agreement shall be governed in all respects by the laws of the State   *
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* of California and by the laws of the United States of America.              *
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*                                                                             *
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* Altera does not recommend, suggest or require that this reference design    *
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* file be used in conjunction or combination with any other product.          *
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******************************************************************************/
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#include "sys/alt_exceptions.h"
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#include "nios2.h"
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#include "alt_types.h"
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#include "system.h"
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/*
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 * This file implements support for calling user-registered handlers for
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 * instruction-generated exceptions. This handler could also be reached
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 * in the event of a spurious interrupt.
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 *
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 * The handler code is optionally enabled through the "Enable
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 * Instruction-related Exception API" HAL BSP setting, which will
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 * define the macro below.
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 */
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#ifdef ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API
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/* Function pointer to exception callback routine */
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alt_exception_result (*alt_instruction_exception_handler)
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  (alt_exception_cause, alt_u32, alt_u32) = 0x0;
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/* Link entry routine to .exceptions section */
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int alt_instruction_exception_entry (alt_u32 exception_pc)
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  __attribute__ ((section (".exceptions")));
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/*
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 * This is the entry point for instruction-generated exceptions handling.
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 * This routine will be called by alt_exceptions_entry.S, after it determines
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 * that an exception could not be handled by handlers that preceed that
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 * of instruction-generated exceptions (such as interrupts).
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 *
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 * For this to function properly, you must register an exception handler
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 * using alt_instruction_exception_register(). This routine will call
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 * that handler if it has been registered. Absent a handler, it will
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 * break break or hang as discussed below.
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 */
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int
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alt_instruction_exception_entry (alt_u32 exception_pc)
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{
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  alt_u32 cause, badaddr;
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/*
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 * If the processor hardware has the optional EXCEPTIONS & BADADDR registers,
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 * read them and pass their content to the user handler. These are always
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 * present if the MMU or MPU is enabled, and optionally for other advanced
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 * exception types via the "Extra exceptions information" setting in the
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 * processor (hardware) configuration.
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 *
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 * If these registers are not present, the cause field will be set to
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 * NIOS2_EXCEPTION_CAUSE_NOT_PRESENT. Your handling routine should
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 * check the validity of the cause argument before proceeding.
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 */
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#ifdef NIOS2_HAS_EXTRA_EXCEPTION_INFO
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  /* Get exception cause & "badaddr" */
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  NIOS2_READ_EXCEPTION(cause);
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  cause = ( (cause & NIOS2_EXCEPTION_REG_CAUSE_MASK) >>
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              NIOS2_EXCEPTION_REG_CAUSE_OFST );
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  NIOS2_READ_BADADDR(badaddr);
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#else
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  cause = NIOS2_EXCEPTION_CAUSE_NOT_PRESENT;
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  badaddr = 0;
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#endif /* NIOS2_HAS_EXTRA_EXCEPTION_INFO */
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  if(alt_instruction_exception_handler) {
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    /*
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     * Call handler. Its return value indicates whether the exception-causing
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     * instruction should be re-issued. The code that called us,
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     * alt_eceptions_entry.S, will look at this value and adjust the ea
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     * register as necessary
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     */
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    return alt_instruction_exception_handler(cause, exception_pc, badaddr);
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  }
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  /*
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   * We got here because an instruction-generated exception occured, but no
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   * handler is present. We do not presume to know how to handle it. If the
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   * debugger is present, break, otherwise hang.
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   *
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   * If you've reached here in the debugger, consider examining the
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   * EXCEPTIONS register cause bit-field, which was read into the 'cause'
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   * variable above, and compare it against the exceptions-type enumeration
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   * in alt_exceptions.h. This register is availabe if the MMU or MPU is
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   * present, or if the "Extra exceptions information" hardware option is
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   * selected.
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   *
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   *  If you get here then one of the following could have happened:
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   *
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   *  - An instruction-generated exception occured, and the processor
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   *    does not have the extra exceptions feature enabled, or you
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   *    have not registered a handler using
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   *    alt_instruction_exception_register()
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   *
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   *  Some examples of instruction-generated exceptions and why they
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   *  might occur:
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   *
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   *  - Your program could have been compiled for a full-featured
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   *    Nios II core, but it is running on a smaller core, and
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   *    instruction emulation has been disabled by defining
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   *    ALT_NO_INSTRUCTION_EMULATION.
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   *
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   *    You can work around the problem by re-enabling instruction
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   *    emulation, or you can figure out why your program is being
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   *    compiled for a system other than the one that it is running on.
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   *
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   *  - Your program has executed a trap instruction, but has not
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   *    implemented a handler for this instruction.
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   *
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   *  - Your program has executed an illegal instruction (one which is
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   *    not defined in the instruction set).
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   *
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   *  - Your processor includes an MMU or MPU, and you have enabled it
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   *    before registering an exception handler to service exceptions it
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   *    generates.
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   *
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   * The problem could also be hardware related:
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   *  - If your hardware is broken and is generating spurious interrupts
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   *    (a peripheral which negates its interrupt output before its
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   *    interrupt handler has been executed will cause spurious interrupts)
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   */
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  else {
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#ifdef NIOS2_HAS_DEBUG_STUB
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    NIOS2_BREAK();
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#else
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    while(1)
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      ;
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#endif /* NIOS2_HAS_DEBUG_STUB */
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  }
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  /* We should not get here. Remove compiler warning. */
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  return NIOS2_EXCEPTION_RETURN_REISSUE_INST;
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}
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#endif /* ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API */
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/*
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 * This routine indicates whether a particular exception cause will have
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 * set a valid address into the BADADDR register, which is included
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 * in the arguments to a user-registered instruction-generated exception
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 * handler. Many exception types do not set valid contents in BADADDR;
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 * this is a convenience routine to easily test the validity of that
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 * argument in your handler.
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 *
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 * Note that this routine will return false (0) for causes
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 * NIOS2_EXCEPTION_TLB_MISS and NIOS2_EXCEPTION_ECC_TLB_ERR.
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 * You must read the TLBMISC.D field to determine if BADADDR
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 * is valid for these (valid if TLBMISC.D = 1).
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 *
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 * Arguments:
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 * cause:  The 5-bit exception cause field of the EXCEPTIONS register,
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 *         shifted to the LSB position. You may pass the 'cause' argument
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 *         in a handler you registered directy to this routine.
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 *
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 * Return: 1: BADADDR (bad_addr argument to handler) is valid
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 *         0: BADADDR is not valid
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 */
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int
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alt_exception_cause_generated_bad_addr(alt_exception_cause cause)
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{
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  switch (cause) {
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  case NIOS2_EXCEPTION_SUPERVISOR_ONLY_DATA_ADDR:
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  case NIOS2_EXCEPTION_MISALIGNED_DATA_ADDR:
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  case NIOS2_EXCEPTION_MISALIGNED_TARGET_PC:
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  case NIOS2_EXCEPTION_TLB_READ_PERM_VIOLATION:
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  case NIOS2_EXCEPTION_TLB_WRITE_PERM_VIOLATION:
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  case NIOS2_EXCEPTION_MPU_DATA_REGION_VIOLATION:
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  case NIOS2_EXCEPTION_ECC_DATA_ERR:
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    return 1;
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  case NIOS2_EXCEPTION_TLB_MISS:
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  case NIOS2_EXCEPTION_ECC_TLB_ERR:
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    return 0;
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  default:
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    return 0;
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  }
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}

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