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[/] [artificial_neural_network/] [trunk/] [ANN_kernel/] [RTL_VHDL_files/] [af_sigmoid_mat.vhd] - Blame information for rev 10

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----------------------------------------------------------------------------------
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-- Company: CEI
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-- Engineer: Enrique Herrero
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--
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-- Create Date:
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-- Design Name: Configurable ANN
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-- Module Name: af_sigmoid_mat - Behavioral
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-- Project Name:
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-- Target Devices:
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-- Tool versions:
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-- Description: Sigmoid activation function implemented as a Look-Up-Table (LUT).
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--             Alternative set of parameters.
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--
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-- Dependencies:
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--
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-- Revision:
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-- Revision 0.01 - File Created
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-- Revision 1 - David Aledo
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-- Additional Comments:
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--
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----------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use ieee.numeric_std.ALL;
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use ieee.math_real.all;
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entity af_sigmoid_mat is
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   generic
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   (
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      Nbit : natural := 8;
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      lsbit : natural := 10
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   );
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   port
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   (
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      reset   : in  std_logic;
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      clk     : in  std_logic;
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      run_in  : in  std_logic; -- Start and input data validation
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      inputs  : in  std_logic_vector(Nbit-1 downto 0); -- Input data
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      run_out : out std_logic; -- Output data validation, run_in for the next layer
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      outputs : out std_logic_vector(Nbit-1 downto 0) -- Output data
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   );
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end af_sigmoid_mat;
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architecture Behavioral of af_sigmoid_mat is
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   -- Definition of internal modules, constants, signals, etc...
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   -- Sigmoid parameters:
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   constant f0 : real := 1.0; -- Slope at the origin
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   constant fr : real := 2.0; -- fr = fmax - fmin
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   signal dataIn: integer range (2**Nbit-1) downto 0; -- To convert std_logic_vector input to integer index for the LUT
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   type table_t is array(0 to (2**Nbit)-1) of std_logic_vector(Nbit-1 downto 0); -- LUT type
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-- Function Sigmoidal: generates the Look-Up-Table for the sigmoid activation function:
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-- margin: maximum value of input
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   function Sigmoidal(margin:real;Nbit:natural;lsbit:natural) return table_t is
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         variable scale,x,y,w,t: real;
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         variable u: integer;
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         variable fbits: std_logic_vector(Nbit-1 downto 0);
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         variable table: table_t;
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      begin
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         scale := (2.0*margin)/(2.0**Nbit);   -- Calculates gap between to points
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         x := -margin;
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         for idx in -(2**(Nbit-1)) to (2**(Nbit-1))-1 loop
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            y := ( fr / (1.0+exp(((-4.0*f0)/fr)*x)) ) - (fr/2.0);
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            w := y*(2.0**(lsbit));           -- Shifts bits to the left
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            t := round(w);
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            u := integer(t);
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            fbits := std_logic_vector(to_signed(u,Nbit));
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            table(to_integer(to_unsigned(idx+(2**Nbit),Nbit))):= fbits;
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            x := x+scale;
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         end loop;
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         return table;
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   end Sigmoidal;
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   signal Table: table_t := Sigmoidal(2.0**(Nbit-lsbit-1),Nbit,lsbit); -- Generation of the LUT (at synthesis time)
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begin
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   -- Description of the activation function
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   dataIn <= to_integer(unsigned(inputs));
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   Activacion: process(clk,reset)
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      begin
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         if clk'event and clk = '1' then
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            if reset = '1' then
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               run_out <= '0';
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               outputs <= (others => '0');
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            else
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               if run_in = '1' then
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                  run_out<='1';
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                  outputs<=Table(dataIn); -- Assigns output value from the LUT
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               else
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                  run_out<='0';
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               end if;
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            end if;
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         end if;
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    end process;
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end Behavioral;

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