1 |
5 |
N.Boukadid |
\addcontentsline{toc}{section}{References}
|
2 |
|
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\begin{thebibliography}{9}
|
3 |
|
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|
4 |
|
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%Introduction
|
5 |
|
|
\bibitem{Wikipedia_protocol}
|
6 |
|
|
Wikipedia,
|
7 |
|
|
\textit{"Communication protocol"}
|
8 |
|
|
[On-line] Available:
|
9 |
|
|
\url{https://en.wikipedia.org/wiki/Communication_protocol} [Apr. 03, 2018]
|
10 |
|
|
|
11 |
|
|
\bibitem{CERN}
|
12 |
|
|
CERN official website,
|
13 |
|
|
\textit{"Acceleration science"}
|
14 |
|
|
[On-line] Available:
|
15 |
|
|
\url{http://cern.ch} [Apr. 03, 2018]
|
16 |
|
|
|
17 |
|
|
%Structure of communication protocols
|
18 |
|
|
\bibitem{OSImodel}
|
19 |
|
|
Tech-faq,
|
20 |
|
|
\textit{"The OSI Model - What It Is; Why It Matters; Why It Doesn't Matter."}
|
21 |
|
|
[On-line] Available:
|
22 |
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|
\url{http://www.tech-faq.com/osi-model.html} [Mar. 27, 2018]
|
23 |
|
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|
24 |
|
|
\bibitem{EthernetPHY}
|
25 |
|
|
Truechip,
|
26 |
|
|
\textit{"Exploring Forward Error Correction Trends in Ethernet"}
|
27 |
|
|
[On-line] Available:
|
28 |
|
|
\url{http://www.truechip.net/articles-details/exploring-forward-error-correction-trends-in-ethernet/1909580257} [Mar. 28, 2018]
|
29 |
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|
|
30 |
|
|
\bibitem{OSI_IP/TCP/UDP}
|
31 |
|
|
Amar Shekar,
|
32 |
|
|
\textit{"OSI Model And 7 Layers Of OSI Model Explained"}
|
33 |
|
|
[On-line] Available:
|
34 |
|
|
\url{https://fossbytes.com/osi-model-7-layers-osi-model-explained/7} [Apr. 19, 2018]
|
35 |
|
|
|
36 |
|
|
\bibitem{Framing}
|
37 |
|
|
Eli Bendersky,
|
38 |
|
|
\textit{"Framing in serial communications"}
|
39 |
|
|
[on-line]. Available:\\
|
40 |
|
|
\url{https://eli.thegreenplace.net/2009/08/12/framing-in-serial-communications/} [Feb. 14, 2018]
|
41 |
|
|
|
42 |
|
|
\bibitem{InterlakenProtocol}
|
43 |
|
|
Cortina Systems Inc. and Cisco Systems Inc.
|
44 |
|
|
\textit{"Interlaken Protocol Definition"}
|
45 |
|
|
[On-line] Available:
|
46 |
|
|
\url{http://www.interlakenalliance.com/Interlaken_Protocol_Definition_v1.2.pdf} [Feb. 09, 2018]
|
47 |
|
|
|
48 |
|
|
\bibitem{SerialLiteIII_MainPage}
|
49 |
|
|
Altera,
|
50 |
|
|
\textit{"Intel® FPGA SerialLite III Streaming IP"}
|
51 |
|
|
[on-line] Available:
|
52 |
|
|
\url{https://www.altera.com/products/intellectual-property/ip/interface-protocols/m-alt-seriallite3.html} [Mar. 29, 2018]
|
53 |
|
|
|
54 |
|
|
\bibitem{CRCLB}
|
55 |
|
|
Lammert Bies,
|
56 |
|
|
\textit{"Introduction to CRC calculation"}
|
57 |
|
|
[On-line] Available:
|
58 |
|
|
\url{https://www.lammertbies.nl/comm/info/crc-calculation.html} [Feb. 08, 2018]
|
59 |
|
|
|
60 |
|
|
\bibitem{CRC1}
|
61 |
|
|
Joleen Charles,
|
62 |
|
|
\textit{"Cyclic Redundancy Check CRC Chapter 4"}
|
63 |
|
|
[On-line] Available:
|
64 |
|
|
\url{http://slideplayer.com/slide/8190698/} [Feb. 14, 2018]
|
65 |
|
|
|
66 |
|
|
\bibitem{turbocode}
|
67 |
|
|
Dr. Sylvie Kerouédan, Dr. Claude Berrou,
|
68 |
|
|
\textit{"Turbo code"}
|
69 |
|
|
[On-line] Available:
|
70 |
|
|
\url{http://www.scholarpedia.org/article/Turbo_code} [Feb. 14, 2018]
|
71 |
|
|
|
72 |
|
|
\bibitem{Gearbox}
|
73 |
|
|
Louis E. Frenzel,
|
74 |
|
|
\textit{"Gearbox operations"}
|
75 |
|
|
[On-line] Available:
|
76 |
|
|
\url{https://books.google.nl/books?id=wnGDBAAAQBAJ} P.26 [Feb. 12, 2018]
|
77 |
|
|
|
78 |
|
|
%Requirements
|
79 |
|
|
\bibitem{FlowControl}
|
80 |
|
|
TutorialsPoint,
|
81 |
|
|
\textit{"Flow Control"}
|
82 |
|
|
[On-line] Available:
|
83 |
|
|
\url{https://www.tutorialspoint.com/data_communication_computer_network/data_link_control_and_protocols.htm} [Mar. 29, 2018]
|
84 |
|
|
|
85 |
|
|
\bibitem{Bonding_Image}
|
86 |
|
|
Sunsik Roh,
|
87 |
|
|
\textit{"Design of Out-of-Band Protocols to Transmit UHDTV Contents in the CATV Network"}
|
88 |
|
|
[On-line] Available:
|
89 |
|
|
\url{http://file.scirp.org/Html/3-9701557_19481.htm} [Feb. 14, 2018]
|
90 |
|
|
|
91 |
|
|
\bibitem{Bonding_Altera}
|
92 |
|
|
Altera,
|
93 |
|
|
\textit{"Using FPGA-Based Channel Bonding for HDTV Over DSL"}
|
94 |
|
|
[On-line] Available:
|
95 |
|
|
\url{https://www.altera.co.jp/content/dam/altera-www/global/en_US/pdfs/literature/wp/wp-01053-using-fpga-based-channel-bonding-for-hdtv-over-dsl.pdf} [Mar. 21, 2018]
|
96 |
|
|
|
97 |
|
|
%Encoding references
|
98 |
|
|
\bibitem{8b10b}
|
99 |
|
|
Knowledge Transfer,
|
100 |
|
|
\textit{"8b/10b encoding"}
|
101 |
|
|
[On-line] Available:
|
102 |
|
|
\url{www.knowledgetransfer.net/dictionary/Storage/en/8b10b_encoding.htm} [Feb. 15, 2018]
|
103 |
|
|
|
104 |
|
|
\bibitem{scrambler}
|
105 |
|
|
M. Moussavi. (5 dec. 2011)
|
106 |
|
|
\textit{"Data Communication and Networking: A Practical Approach"}
|
107 |
|
|
[on-line]. Available: \url{https://books.google.nl/books?id=gX8KAAAAQBAJ}. [Feb. 07, 2018]
|
108 |
|
|
Cengage Learning, 5 dec. 2011
|
109 |
|
|
|
110 |
|
|
\bibitem{NIcoding}
|
111 |
|
|
National Instruments.
|
112 |
|
|
\textit{"High-Speed Serial Explained"}
|
113 |
|
|
[On-line] Available: \url{ftp://ftp.ni.com/evaluation/HighSpeedSerial_WP_Final.pdf} [Feb. 07, 2018]
|
114 |
|
|
|
115 |
|
|
\bibitem{6466header}
|
116 |
|
|
Marek Hajduczenia,
|
117 |
|
|
\textit{"64b/66b line code"}
|
118 |
|
|
[On-line] Available:
|
119 |
|
|
\url{http://www.ieee802.org/3/bn/public/mar13/hajduczenia_3bn_04_0313.pdf} [Feb. 16, 2018]
|
120 |
|
|
|
121 |
|
|
\bibitem{PCIE}
|
122 |
|
|
Intel.
|
123 |
|
|
\textit{PHY Interface for the PCI Express, SATA, USB 3.1, DisplayPort and Converged IO Architectures}
|
124 |
|
|
[On-line] Available: \url{https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/phy-interface-pci-express-sata-usb30-architectures-3.1.pdf} P.124 [Feb. 07, 2018]
|
125 |
|
|
|
126 |
|
|
\bibitem{USB3.1}
|
127 |
|
|
Synopsys.
|
128 |
|
|
\textit{"USB 3.1: Physical, Link, and Protocol Layer Changes"}
|
129 |
|
|
[On-line] Available: \url{https://www.synopsys.com/designware-ip/technical-bulletin/protocol-layer-changes.html} [Feb. 07, 2018]
|
130 |
|
|
|
131 |
|
|
\bibitem{256b/257b}
|
132 |
|
|
Roy Cideciyan (IBM),
|
133 |
|
|
\textit{"256b/257b Transcoding for 100 Gb/s Backplane and Copper Cable"}
|
134 |
|
|
[On-line] Available:
|
135 |
|
|
\url{http://www.ieee802.org/3/100GNGOPTX/public/mar12/interim/cideciyan_01_0312_NG100GOPTX.pdf} [Feb. 16, 2018]
|
136 |
|
|
|
137 |
|
|
\bibitem{FibreChannel_Encoding}
|
138 |
|
|
Craig W. Carlson, QLogic Corporation,
|
139 |
|
|
\textit{"Gen 6 FibreChannel What You Need to Know "}
|
140 |
|
|
[On-line] Available:
|
141 |
|
|
\url{http://www.snia.org/sites/default/orig/DSI2014/presentations/StorPlumb/CraigCarlson_Gen_6_Fibre_Channel_v02.pdf} (Slide 14) [Mar. 29, 2018]
|
142 |
|
|
|
143 |
|
|
%Vendor dependant protocols
|
144 |
|
|
\bibitem{Aurora_64B66B_MainPage}
|
145 |
|
|
Xilinx.
|
146 |
|
|
\textit{"Aurora 64B/66B"}
|
147 |
|
|
[on-line] Available:
|
148 |
|
|
\url{https://www.xilinx.com/products/intellectual-property/aurora64b66b.html} [Feb. 13, 2018]
|
149 |
|
|
|
150 |
|
|
\bibitem{Aurora_8B10B_MainPage}
|
151 |
|
|
Xilinx.
|
152 |
|
|
\textit{"Aurora 8B/10B"}
|
153 |
|
|
[on-line] Available:
|
154 |
|
|
\url{https://www.xilinx.com/products/intellectual-property/aurora8b10b.html} [Mar. 29, 2018]
|
155 |
|
|
|
156 |
|
|
\bibitem{Aurora_64B66B_IpCore}
|
157 |
|
|
Xilinx,
|
158 |
|
|
\textit{"Aurora 64B/66B v11.2 LogiCORE IP Product Guide"}
|
159 |
|
|
[on-line] Available:
|
160 |
|
|
\url{https://www.xilinx.com/support/documentation/ip_documentation/aurora_64b66b/v11_2/pg074-aurora-64b66b.pdf} [Feb. 13, 2018]
|
161 |
|
|
|
162 |
|
|
\bibitem{SerialLiteIII_IpCore}
|
163 |
|
|
Altera,
|
164 |
|
|
\textit{"Intel FPGA SerialLite III Streaming IP Core User Guide"}
|
165 |
|
|
[on-line] Available:
|
166 |
|
|
\url{https://www.altera.com/documentation/jbz1470383208039.html} [Feb. 16, 2018]
|
167 |
|
|
|
168 |
|
|
\bibitem{LiteFast_IpCore}
|
169 |
|
|
MicroSemi,
|
170 |
|
|
\textit{"UG0701 User Guide LiteFast IP"}
|
171 |
|
|
[on-line] Available:
|
172 |
|
|
\url{https://www.microsemi.com/document-portal/doc_view/135971-ug0701-litefast-ip-user-guide} [Apr. 23, 2018]
|
173 |
|
|
%Standards references
|
174 |
|
|
\bibitem{SPI4.2}
|
175 |
|
|
eInfochips Ltd.
|
176 |
|
|
\textit{"System Packet Interface (SPI) 4.2 IP Core"}
|
177 |
|
|
[On-line] Available:
|
178 |
|
|
\url{https://www.design-reuse.com/articles/18135/system-packet-interface-spi-4-2-ip-core.html} [Feb. 21, 2018]
|
179 |
|
|
|
180 |
|
|
|
181 |
|
|
|
182 |
|
|
\bibitem{InterlakenRS}
|
183 |
|
|
Cortina Systems Inc. and Cisco Systems Inc.
|
184 |
|
|
\textit{"Interlaken Reed-Solomon Forward Error Correction Extension Protocol Definition"}
|
185 |
|
|
[On-line] Available:
|
186 |
|
|
\url{http://www.interlakenalliance.com/extension_v1.pdf}, Dec. 2016, [Feb. 09, 2018]
|
187 |
|
|
|
188 |
|
|
\bibitem{XilinxInterlaken}
|
189 |
|
|
Xilinx.
|
190 |
|
|
\textit{"Integrated Interlaken 150G v2.0 LogiCORE IP Product Guide"}
|
191 |
|
|
[On-line] Available:
|
192 |
|
|
\url{https://www.xilinx.com/support/documentation/ip_documentation/interlaken/v2_0/pg169-interlaken.pdf} [Feb. 09, 2018]
|
193 |
|
|
|
194 |
|
|
\bibitem{AlteraInterlaken}
|
195 |
|
|
Altera.
|
196 |
|
|
\textit{"Interlaken IP Core (2nd Generation) User Guide"}
|
197 |
|
|
[On-line] Available:
|
198 |
|
|
\url{https://www.altera.com/documentation/dsu1465510510715.html} [Feb. 09, 2018]
|
199 |
|
|
|
200 |
|
|
\bibitem{SATA_Specifications}
|
201 |
|
|
Serial ATA International Organization,
|
202 |
|
|
\textit{"Serial ATA International Organization: Serial ATA Revision 3.0 "}
|
203 |
|
|
[On-line] Available:
|
204 |
|
|
\url{http://www.lttconn.com/res/lttconn/pdres/201005/20100521170123066.pdf} [Apr. 09, 2018]
|
205 |
|
|
|
206 |
|
|
\bibitem{SATATech}
|
207 |
|
|
Donovan (Don) Anderson
|
208 |
|
|
\textit{"SATA Storage Technology"}
|
209 |
|
|
[On-line] Available:
|
210 |
|
|
\url{https://www.mindshare.com/files/ebooks/SATA%20Storage%20Technology.pdf} [Feb. 09, 2018]
|
211 |
|
|
|
212 |
|
|
\bibitem{SATA_E}
|
213 |
|
|
Serial ATA International Organization.
|
214 |
|
|
\textit{SATA Express Specification from SATA-IO in Ratification}
|
215 |
|
|
[On-line] Available:
|
216 |
|
|
\url{https://sata-io.org/sites/default/files/documents/SATA%20Express%20In%20Ratification_Final_Website.pdf} [Feb. 12, 2018]
|
217 |
|
|
|
218 |
|
|
\bibitem{SATA_E2}
|
219 |
|
|
Dave Landsman, Sandisk
|
220 |
|
|
\textit{AHCI and NVMe as Interfaces for SATA Express™ Devices - Overview}
|
221 |
|
|
[On-line] Available:
|
222 |
|
|
\url{https://sata-io.org/sites/default/files/images/NVMe_and_AHCI_as_SATA_Express_Interface_Options_Overview_final.pdf} [Feb. 12, 2018]
|
223 |
|
|
|
224 |
|
|
\bibitem{CPRI_Specification}
|
225 |
|
|
Ericsson AB, Huawei Technologies Co. Ltd, NEC Corporation, Alcatel Lucent, and Nokia Networks.
|
226 |
|
|
\textit{"CPRI Specification V7.0"}
|
227 |
|
|
[On-line] Available:
|
228 |
|
|
\url{http://www.cpri.info/downloads/CPRI_v_7_0_2015-10-09.pdf} [Feb. 21, 2018]
|
229 |
|
|
|
230 |
|
|
\bibitem{HyperTransport_Specifications}
|
231 |
|
|
HyperTransport Technology Consortium.
|
232 |
|
|
\textit{"HyperTransport™ I/O Link Specification Revision 3.10c"}
|
233 |
|
|
[On-line] Available:
|
234 |
|
|
\url{https://docs.wixstatic.com/ugd/071cb6_53b2dc066f2d4408b5c9368dc447e2f5.pdf} [Feb. 21, 2018]
|
235 |
|
|
|
236 |
|
|
\bibitem{HTpic}
|
237 |
|
|
HT consortium.
|
238 |
|
|
\textit{"HyperTransport Link Specifications"}
|
239 |
|
|
[On-line] Available:
|
240 |
|
|
\url{https://www.hypertransport.org/ht-link-specifications} [Feb. 08, 2018]
|
241 |
|
|
|
242 |
|
|
\bibitem{HTIP}
|
243 |
|
|
David Slogsnat, Alexander Giese, Mondrian Nüssle, Ulrich Brüning.
|
244 |
|
|
\textit{"An open-source HyperTransport IP-Core"}
|
245 |
|
|
[On-line] Available:
|
246 |
|
|
\url{https://docs.wixstatic.com/ugd/071cb6_1d4e8365b49f4d9f8eab9b1e611ea60e.pdf} [Feb. 08, 2018]
|
247 |
|
|
|
248 |
|
|
\bibitem{HT3IP}
|
249 |
|
|
Heiner Litz, Holger Froening, Ulrich Bruening,
|
250 |
|
|
\textit{"A HyperTransport 3 Physical Layer Interface for FPGAs"}
|
251 |
|
|
[On-line] Available:
|
252 |
|
|
\url{https://people.ucsc.edu/~hlitz/papers/ht3phy.pdf} [Feb. 08, 2018]
|
253 |
|
|
|
254 |
|
|
\bibitem{FC}
|
255 |
|
|
Fibre Channel Industry Association (FCIA),
|
256 |
|
|
\textit{"State of the Fibre Channel Industry"}
|
257 |
|
|
[On-line] Available:
|
258 |
|
|
\url{http://fibrechannel.org/wp-content/uploads/2015/10/FCIA_Sol_Guide_2010_Final_v2.pdf} [Feb. 12, 2018]
|
259 |
|
|
|
260 |
|
|
\bibitem{FC64}
|
261 |
|
|
Adrian Butter,
|
262 |
|
|
\textit{"64GFC PCS/FEC Architecture Proposal for FC-FS-5"}
|
263 |
|
|
[On-line] Available:
|
264 |
|
|
\url{https://standards.incits.org/apps/group_public/download.php/82006/T11-2016-314v5.pdf} [Feb. 12, 2018]
|
265 |
|
|
|
266 |
|
|
\bibitem{FC_Xilinx}
|
267 |
|
|
Xilinx,
|
268 |
|
|
\textit{"LogiCORE™ IP Fibre Channel User Guide v3.5"}
|
269 |
|
|
[On-line] \\ Available:
|
270 |
|
|
\url{https://www.xilinx.com/support/documentation/ip_documentation/fibre_channel_ug136.pdf} [Feb. 12, 2018]
|
271 |
|
|
|
272 |
|
|
\bibitem{FC_Xilinx32G}
|
273 |
|
|
Xilinx,
|
274 |
|
|
\textit{"32G Fibre Channel (32GFC) RS-FEC v1.0"}
|
275 |
|
|
[On-line] Available:
|
276 |
|
|
\url{https://www.xilinx.com/support/documentation/ip_documentation/fc32_rs_fec/v1_0/pb048-fibre-channel-32gfc-rs-fec.pdf} [Feb. 12, 2018]
|
277 |
|
|
|
278 |
|
|
\bibitem{XAUI_10gea}
|
279 |
|
|
10 Gigabit Ethernet Alliance (10gea),
|
280 |
|
|
\textit{"XAUI interface"}
|
281 |
|
|
[On-line] Available:
|
282 |
|
|
\url{https://www.10gea.org/whitepapers/xaui-interface/} [Feb. 12, 2018]
|
283 |
|
|
|
284 |
|
|
\bibitem{XAUI_AT}
|
285 |
|
|
Agilent Technologies,
|
286 |
|
|
\textit{"10 Gigabit Ethernet and the XAUI interface"}
|
287 |
|
|
[On-line] Available:
|
288 |
|
|
\url{http://literature.cdn.keysight.com/litweb/pdf/5988-5509EN.pdf} [Feb. 12, 2018]
|
289 |
|
|
|
290 |
|
|
\bibitem{HiGig}
|
291 |
|
|
Altera/IntelFPGA,
|
292 |
|
|
\textit{"HiGig / HiGig+ / HiGig 2"}
|
293 |
|
|
[On-line] Available:
|
294 |
|
|
\url{https://www.altera.com/solutions/technology/transceiver/protocols/pro-higig.html} [Feb. 16, 2018]
|
295 |
|
|
|
296 |
|
|
%The Interlaken Protocol
|
297 |
|
|
\bibitem{InterlakenAlliance}
|
298 |
|
|
Interlaken Alliance,
|
299 |
|
|
\textit{"Interlaken Alliance"}
|
300 |
|
|
[On-line] Available:
|
301 |
|
|
\url{http://interlakenalliance.com/} [Mar. 29, 2018]
|
302 |
|
|
|
303 |
|
|
\bibitem{InterlakenRecommendations}
|
304 |
|
|
Interlaken Alliance,
|
305 |
|
|
\textit{"Interlaken Interoperability Recommendations"}
|
306 |
|
|
[On-line] Available:
|
307 |
|
|
\url{http://www.interlakenalliance.com/interlaken-interoperability-recommendations-v1.10.pdf} [Apr. 03, 2018]
|
308 |
|
|
|
309 |
|
|
%Traditional CERN Protocols
|
310 |
|
|
\bibitem{S-Link}
|
311 |
|
|
Erik van der Bij,
|
312 |
|
|
\textit{"S-Link Overview"}
|
313 |
|
|
[On-line] Available:
|
314 |
|
|
\url{http://hsi.web.cern.ch/HSI/s-link/introduc/overview.htm} [Feb. 08, 2018]
|
315 |
|
|
|
316 |
|
|
\bibitem{GBT_Frame}
|
317 |
|
|
CERN,
|
318 |
|
|
\textit{"GBT ASIC presentation"}
|
319 |
|
|
[On-line] Available:
|
320 |
|
|
\url{https://indico.cern.ch/event/49682/contributions/1175873/attachments/961783/1365381/2009_09_25_Implementing_the_GBT_data_transmission_protocol_in_FPGAs.pdf} [Feb. 08, 2018]
|
321 |
|
|
|
322 |
|
|
|
323 |
|
|
%Hardware part
|
324 |
|
|
\bibitem{Virtex-7}
|
325 |
|
|
Xilinx.
|
326 |
|
|
\textit{"7 Series FPGAs Data Sheet: Overview"}
|
327 |
|
|
[On-line] Available:
|
328 |
|
|
\url{https://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf} [Feb. 19, 2018]
|
329 |
|
|
|
330 |
|
|
\bibitem{VC707}
|
331 |
|
|
Xilinx.
|
332 |
|
|
\textit{"VC707 Evaluation Board for the Virtex-7 FPGA - User Guide"}
|
333 |
|
|
[On-line] Available:
|
334 |
|
|
\url{https://www.xilinx.com/support/documentation/boards_and_kits/vc707/ug885_VC707_Eval_Bd.pdf} [Feb. 19, 2018]
|
335 |
|
|
|
336 |
|
|
\bibitem{GTXT}
|
337 |
|
|
Xilinx.
|
338 |
|
|
\textit{"7 Series FPGAs GTX/GTH Transceivers - User Guide"}
|
339 |
|
|
[On-line] Available:
|
340 |
|
|
\url{https://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf} [Feb. 19, 2018]
|
341 |
|
|
|
342 |
|
|
\bibitem{CRC32}
|
343 |
|
|
Mathlab.
|
344 |
|
|
\textit{"CRC-N Generator"}
|
345 |
|
|
[On-line] Available:
|
346 |
|
|
\url{https://nl.mathworks.com/help/comm/ref/crcngenerator.html} [Feb. 21, 2018]
|
347 |
|
|
|
348 |
|
|
\bibitem{CRCpaper}
|
349 |
|
|
Evgeni Stavinov.
|
350 |
|
|
\textit{"A Practical Parallel CRC Generation Method"}
|
351 |
|
|
[On-line] Available:
|
352 |
|
|
\url{http://outputlogic.com/my-stuff/circuit-cellar-january-2010-crc.pdf} [Feb. 22, 2018]
|
353 |
|
|
|
354 |
|
|
\bibitem{CRCgen}
|
355 |
|
|
Evgeni Stavinov.
|
356 |
|
|
\textit{"CRC Generator"}
|
357 |
|
|
[On-line] Available:
|
358 |
|
|
\url{http://outputlogic.com/?page_id=321} [Feb. 22, 2018]
|
359 |
|
|
|
360 |
|
|
\bibitem{Scramblergen}
|
361 |
|
|
Evgeni Stavinov.
|
362 |
|
|
\textit{"Scrambler Generator"}
|
363 |
|
|
[On-line] Available:
|
364 |
|
|
\url{http://outputlogic.com/?page_id=205} [Feb. 23, 2018]
|
365 |
|
|
|
366 |
|
|
|
367 |
|
|
|
368 |
|
|
\end{thebibliography}
|
369 |
|
|
\newpage
|