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[/] [ethmac/] [tags/] [rel_14/] [rtl/] [verilog/] [TODO] - Blame information for rev 338

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1 165 mohor
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  TODO                                                        ////
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////                                                              ////
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////  This file is part of the Ethernet IP core project           ////
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////  http://www.opencores.org/projects/ethmac/                   ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - Igor Mohor (igorM@opencores.org)                      ////
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////                                                              ////
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////  All additional information is available in the Readme.txt   ////
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////  file.                                                       ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2001, 2002 Authors                             ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: not supported by cvs2svn $
44 259 mohor
// Revision 1.1  2002/09/10 10:42:06  mohor
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// HASH improvement needed.
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//
47 165 mohor
 
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- Add logic for easier use of the HASH table: First write MAC address to some
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  register. Then issue a command. CRC is calculated from this MAC and appropriate
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  bit written to the HASH register.
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53 259 mohor
- In loopback rx_clk is not looped back. Possible CRC error. Consider if usage of
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  additional logic is necessery (FIFO for looping the data).
55 165 mohor
 
56 259 mohor
 
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