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[/] [fast_log/] [trunk/] [Log2highacc.v] - Blame information for rev 6

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1 6 MichaelDun
module Log2highacc
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/*
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A fast base-2 logarithm function, 24 bits (22 used) in, 12 bits out.
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Designed and coded by: Michael Dunn, http://www.cantares.on.ca/
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(more info at the web site - see "Extras")
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Executes every cycle, with a latency of 3.
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Compared to previous versions, this one has a larger, higher resolution
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lookup table. This provides a smoother and more accurate output, though
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a downside of having higher LUT resolution than the LUT depth fully
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supports is that there are missing codes in the output. If this is a problem,
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the lower 2 or 3 output bits can be ignored. In most cases, use all the
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bits you can!
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Valid input range = 000100 - FFFFFF. In effect, there is a binary point:
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xxxx.yy. Logs of inputs below 1.00 are negative, and not handled by this design.
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License: Free to use & modify, but please keep this header intact.
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August 2, 2010, Kitchener, Ontario, Canada
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*/
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(
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        input [23:0]     DIN,
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        input                   clk,
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        output  [11:0]   DOUT
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);
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// Comprises 4 main blocks: priority encoder, barrel shifter, LUT, and adder.
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reg     [3:0]    priencout1;
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reg     [3:0]    priencout2;
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reg     [3:0]    priencout3;
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reg     [5:0]    barrelout;
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reg     [20:0]   barrelin;
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reg     [7:0]    LUTout;
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assign  DOUT    =       {priencout3, LUTout};   // Basic top-level connectivity
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always @(posedge clk)
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begin
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        priencout2      <=      priencout1;
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        priencout3      <=      priencout2;
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        barrelin        <=      DIN[22:2];
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end
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wire [20:0] tmp1 =       (barrelin << ~priencout1);      // Barrel shifter - OMG, it's a primitive in Verilog!
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always @(posedge clk)
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begin
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        barrelout       <=      tmp1[20:15];
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end
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wire    [15:0]   priencin = DIN[23:8];
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always @(posedge clk)                                           // Priority encoder
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casex (priencin)
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        16'b1xxxxxxxxxxxxxxx:   priencout1      <=      15;
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        16'b01xxxxxxxxxxxxxx:   priencout1      <=      14;
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        16'b001xxxxxxxxxxxxx:   priencout1      <=      13;
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        16'b0001xxxxxxxxxxxx:   priencout1      <=      12;
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        16'b00001xxxxxxxxxxx:   priencout1      <=      11;
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        16'b000001xxxxxxxxxx:   priencout1      <=      10;
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        16'b0000001xxxxxxxxx:   priencout1      <=      9;
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        16'b00000001xxxxxxxx:   priencout1      <=      8;
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        16'b000000001xxxxxxx:   priencout1      <=      7;
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        16'b0000000001xxxxxx:   priencout1      <=      6;
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        16'b00000000001xxxxx:   priencout1      <=      5;
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        16'b000000000001xxxx:   priencout1      <=      4;
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        16'b0000000000001xxx:   priencout1      <=      3;
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        16'b00000000000001xx:   priencout1      <=      2;
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        16'b000000000000001x:   priencout1      <=      1;
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        16'b000000000000000x:   priencout1      <=      0;
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endcase
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/*
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LUT for log fraction lookup
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 - can be done with array or case:
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case (addr)
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0:out=0;
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.
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31:out=15;
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endcase
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        OR
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wire [3:0] lut [0:31];
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assign lut[0] = 0;
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.
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assign lut[31] = 15;
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Are there any better ways?
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*/
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// Let's try "case".
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// The equation is: output = log2(1+input/64)*256
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// For larger tables, better to generate a separate data file using a program!
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always @(posedge clk)
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case (barrelout)
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        0:       LUTout  <=      0;
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        1:      LUTout  <=      6;
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        2:      LUTout  <=      11;
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        3:      LUTout  <=      17;
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        4:      LUTout  <=      22;
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        5:      LUTout  <=      28;
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        6:      LUTout  <=      33;
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        7:      LUTout  <=      38;
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        8:      LUTout  <=      44;
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        9:      LUTout  <=      49;
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        10:     LUTout  <=      54;
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        11:     LUTout  <=      59;
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        12:     LUTout  <=      63;
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        13:     LUTout  <=      68;
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        14:     LUTout  <=      73;
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        15:     LUTout  <=      78;
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        16:     LUTout  <=      82;
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        17:     LUTout  <=      87;
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        18:     LUTout  <=      92;
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        19:     LUTout  <=      96;
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        20:     LUTout  <=      100;
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        21:     LUTout  <=      105;
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        22:     LUTout  <=      109;
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        23:     LUTout  <=      113;
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        24:     LUTout  <=      118;
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        25:     LUTout  <=      122;
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        26:     LUTout  <=      126;
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        27:     LUTout  <=      130;
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        28:     LUTout  <=      134;
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        29:     LUTout  <=      138;
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        30:     LUTout  <=      142;
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        31:     LUTout  <=      146;
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        32:     LUTout  <=      150;
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        33:     LUTout  <=      154;
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        34:     LUTout  <=      157;
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        35:     LUTout  <=      161;
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        36:     LUTout  <=      165;
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        37:     LUTout  <=      169;
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        38:     LUTout  <=      172;
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        39:     LUTout  <=      176;
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        40:     LUTout  <=      179;
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        41:     LUTout  <=      183;
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        42:     LUTout  <=      186;
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        43:     LUTout  <=      190;
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        44:     LUTout  <=      193;
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        45:     LUTout  <=      197;
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        46:     LUTout  <=      200;
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        47:     LUTout  <=      203;
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        48:     LUTout  <=      207;
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        49:     LUTout  <=      210;
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        50:     LUTout  <=      213;
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        51:     LUTout  <=      216;
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        52:     LUTout  <=      220;
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        53:     LUTout  <=      223;
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        54:     LUTout  <=      226;
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        55:     LUTout  <=      229;
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        56:     LUTout  <=      232;
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        57:     LUTout  <=      235;
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        58:     LUTout  <=      238;
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        59:     LUTout  <=      241;
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        60:     LUTout  <=      244;
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        61:     LUTout  <=      247;
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        62:     LUTout  <=      250;
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        63:     LUTout  <=      253;
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endcase
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endmodule

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