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[/] [keras_to_fpga/] [trunk/] [sim/] [src/] [tb_base/] [t_debug.svh] - Blame information for rev 2

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1 2 qaztronic
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2018 Authors and OPENCORES.ORG                 ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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class t_debug extends t_top_base;
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   `uvm_component_utils(t_debug)
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  // --------------------------------------------------------------------
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  function new(string name = "t_debug", uvm_component parent);
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    super.new(name, parent);
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  endfunction
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  // --------------------------------------------------------------------
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  function void end_of_elaboration_phase(uvm_phase phase);
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    uvm_phase run_phase = uvm_run_phase::get();
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    run_phase.phase_done.set_drain_time(this, 100ns);
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  endfunction
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  // --------------------------------------------------------------------
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  function void final_phase(uvm_phase phase);
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    super.final_phase(phase);
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    $display("^^^ %16.t | %m | Test Done!!!", $time);
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    $stop;
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  endfunction : final_phase
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  // --------------------------------------------------------------------
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  virtual task run_phase(uvm_phase phase);
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    s_debug seq = s_debug::type_id::create("seq");
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    s_avf_slave_base s_seq = s_avf_slave_base::type_id::create("s_seq");
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    s_seq.sequencer_h = env_h.s_agent_h.sequencer_h;
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    fork
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      s_seq.start(env_h.s_agent_h.sequencer_h);
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    join_none
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    seq.init(env_h.cfg_h.m_cfg_h.c_h);
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    phase.raise_objection(this);
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    seq.start(env_h.m_agent_h.sequencer_h);
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    phase.drop_objection(this);
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  endtask : run_phase
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// --------------------------------------------------------------------
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endclass : t_debug

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