URL https://opencores.org/ocsvn/keras_to_fpga/keras_to_fpga/trunk

Subversion Repositories keras_to_fpga

[/] [keras_to_fpga/] [trunk/] [sim/] [tests/] [tb_xor/] [sim.f] - Blame information for rev 2

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#
#
 
# +incdir+${ALTERA_LIBS}/code
 
# +UVM_VERBOSITY=UVM_DEBUG
+UVM_VERBOSITY=UVM_HIGH
 
-voptargs=+acc=npr+/tb_top
-voptargs=+acc=npr+/tb_top/dut
 
-L work
-L ${ALTERA_LIBS}/altera_ver
-L ${ALTERA_LIBS}/lpm_ver
-L ${ALTERA_LIBS}/sgate_ver
-L ${ALTERA_LIBS}/altera_mf_ver
-L ${ALTERA_LIBS}/altera_lnsim_ver
-L ${ALTERA_LIBS}/twentynm_ver
-L ${ALTERA_LIBS}/twentynm_hssi_ver
-L ${ALTERA_LIBS}/twentynm_hip_ver

Line No.	Rev	Author	Line
1	2	qaztronic	`#`
2			`#`
3
4			`# +incdir+${ALTERA_LIBS}/code`
5
6			`# +UVM_VERBOSITY=UVM_DEBUG`
7			`+UVM_VERBOSITY=UVM_HIGH`
8
9			`-voptargs=+acc=npr+/tb_top`
10			`-voptargs=+acc=npr+/tb_top/dut`
11
12			`-L work`
13			`-L ${ALTERA_LIBS}/altera_ver`
14			`-L ${ALTERA_LIBS}/lpm_ver`
15			`-L ${ALTERA_LIBS}/sgate_ver`
16			`-L ${ALTERA_LIBS}/altera_mf_ver`
17			`-L ${ALTERA_LIBS}/altera_lnsim_ver`
18			`-L ${ALTERA_LIBS}/twentynm_ver`
19			`-L ${ALTERA_LIBS}/twentynm_hssi_ver`
20			`-L ${ALTERA_LIBS}/twentynm_hip_ver`

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Subversion Repositories keras_to_fpga

[/] [keras_to_fpga/] [trunk/] [sim/] [tests/] [tb_xor/] [sim.f] - Blame information for rev 2