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[/] [lxp32/] [trunk/] [verify/] [lxp32/] [src/] [firmware/] [test015.asm] - Blame information for rev 9

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Line No. Rev Author Line
1 9 ring0_mipt
/*
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 * Test unconventional interrupt handlers
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 */
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        lc r100, 0x10000000 // test result output pointer
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        lc r101, halt
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        lc r102, 0x30000000 // coprocessor input register
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        lc r103, 0x30000004 // coprocessor output register
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        lc r104, failure
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// Initialize interrupt handlers
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        lc iv2, coprocessor_handler
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        mov cr, 4 // enable interrupts from the coprocessor
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        lc r110, interrupt_exit@1 // '1' in the LSB is an interrupt exit flag
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// Initialize random generator
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        mov r64, 1 // initial PRBS value
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        lc r65, 1103515245 // PRBS multiplier
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        lc r66, 12345 // PRBS addition constant
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        lc r67, 32767 // PRBS mask
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// Main loop
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        lc r32, loop
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        lc r33, rand
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        lc r34, 2000
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loop:
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        call r33
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        cjmpe r32, r0, 0 // if(r==0) continue;
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        sw r102, r0
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        hlt
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interrupt_exit:
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        lw r1, r103
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        mul r0, r0, 3
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        cjmpne r104, r0, r1 // failure
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        sub r34, r34, 1
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        cjmpug r32, r34, 0 // loop
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        sw r100, 1
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        jmp r101 // halt
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failure:
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        sw r100, 2
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halt:
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        hlt
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        jmp r101 // halt
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rand:
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        mul r64, r64, r65
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        add r64, r64, r66
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        sru r0, r64, 16
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        and r0, r0, r67
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        ret
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coprocessor_handler:
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        jmp r110 // exit to a given point, ignore irp

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