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[/] [mblite/] [tags/] [1.0/] [tb/] [rom_logic.mem] - Blame information for rev 2

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// memory data file (do not edit the following line - required for mem load use)
// OR   R1, R10, R12
// AND  R1, R10, R12
// XOR  R1, R10, R12
// ANDN R1, R10, R12
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1
@00000000
802A6000
842A6000
882A6000
8C2A6000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

Line No.	Rev	Author	Line
1	2	takar	`// memory data file (do not edit the following line - required for mem load use)`
2			`// OR R1, R10, R12`
3			`// AND R1, R10, R12`
4			`// XOR R1, R10, R12`
5			`// ANDN R1, R10, R12`
6			`// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1`
7			`@00000000`
8			`802A6000`
9			`842A6000`
10			`882A6000`
11			`8C2A6000`
12			`00000000`
13			`00000000`
14			`00000000`
15			`00000000`
16			`00000000`
17			`00000000`
18			`00000000`
19			`00000000`
20			`00000000`
21			`00000000`
22			`00000000`

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[/] [mblite/] [tags/] [1.0/] [tb/] [rom_logic.mem] - Blame information for rev 2