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[/] [mblite/] [trunk/] [designs/] [core/] [Makefile] - Blame information for rev 11

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Line No. Rev Author Line
1 2 takar
TOP_LEVEL_DIR=../..
2 11 takar
DESIGN_DIR=.
3 2 takar
 
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MBLITE_HW_DIR=$(TOP_LEVEL_DIR)/hw
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MBLITE_STD_DIR=$(MBLITE_HW_DIR)/std
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MBLITE_CORE_DIR=$(MBLITE_HW_DIR)/core
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8 11 takar
WORK_DIR=$(DESIGN_DIR)/work
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MODELSIM_WORK_DIR=$(WORK_DIR)/modelsim
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XILINX_WORK_DIR=$(WORK_DIR)/xilinx
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12 2 takar
MBLITE_LIBRARY_NAME=mblite
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WORK_LIBRARY_NAME=work
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default:
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        @echo "Makefile for the MB-lite microprocessor"
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        @echo "---------------------------------------"
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        @echo "Make options:"
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        @echo "   default: Echo these instructions"
20 11 takar
        @echo "  modelsim: Build Modelsim project"
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        @echo "    xilinx: Build Xilinx project"
22 2 takar
        @echo "     clean: Remove all compiled and generated files"
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24 11 takar
modelsim: modelsim-design
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################
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# WORK library #
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################
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# Create library WORK
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modelsim-worklib:
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        @vlib $(MODELSIM_WORK_DIR)/$(WORK_LIBRARY_NAME)
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        @vmap $(WORK_LIBRARY_NAME) $(MODELSIM_WORK_DIR)/$(WORK_LIBRARY_NAME)
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# Compile MB-LITE configuration to library MB-LITE
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modelsim-mblite-config: modelsim-mblitelib
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(DESIGN_DIR)/config_Pkg.vhd
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# Compile a design using MB-LITE to library WORK
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modelsim-design: modelsim-std modelsim-mblite-config modelsim-core modelsim-worklib
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        @vcom -work $(WORK_LIBRARY_NAME) $(DESIGN_DIR)/testbench.vhd
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# Copy memory and do files to work dir
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modelsim-init:
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        @cp $(DESIGN_DIR)/*.mem $(MODELSIM_WORK_DIR)
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        @cp $(DESIGN_DIR)/*.do $(MODELSIM_WORK_DIR)
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###################
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# MB-LITE library #
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###################
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# Create library MB-LITE
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modelsim-mblitelib:
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        @mkdir -p $(MODELSIM_WORK_DIR)
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        @vlib $(MODELSIM_WORK_DIR)/$(MBLITE_LIBRARY_NAME)
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        @vmap $(MBLITE_LIBRARY_NAME) $(MODELSIM_WORK_DIR)/$(MBLITE_LIBRARY_NAME)
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# Compile MB-LITE standard components
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modelsim-std: modelsim-mblitelib
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_STD_DIR)/std_Pkg.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_STD_DIR)/dsram.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_STD_DIR)/sram_4en.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_STD_DIR)/sram.vhd
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65 11 takar
# Compile MB-LITE core
66 2 takar
modelsim-core: modelsim-std modelsim-mblite-config
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_CORE_DIR)/core_Pkg.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_CORE_DIR)/core.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_CORE_DIR)/fetch.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_CORE_DIR)/gprf.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_CORE_DIR)/decode.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_CORE_DIR)/execute.vhd
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        @vcom -work $(MBLITE_LIBRARY_NAME) $(MBLITE_CORE_DIR)/mem.vhd
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75 11 takar
#############################
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# Create xilinx ISE project #
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#############################
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xilinx: xilinx-clean
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        @mkdir -p $(XILINX_WORK_DIR)
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        @xtclsh $(DESIGN_DIR)/Xilinx.tcl
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83 2 takar
###########################
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# Remove work directories #
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###########################
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87 11 takar
xilinx-clean:
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        @rm -rf core.gise
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        @rm -rf core.xise
90 2 takar
 
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clean:
92 11 takar
        @rm -rf $(WORK_DIR)
93 2 takar
        @rm -f transcript
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        @rm -f modelsim.ini
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        @rm -f vsim.wlf

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