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[/] [mblite/] [trunk/] [designs/] [core_decoder/] [config_Pkg.vhd] - Blame information for rev 8

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----------------------------------------------------------------------------------------------
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--
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--      Input file         : config_Pkg.vhd
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--      Design name        : config_Pkg
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--      Author             : Tamar Kranenburg
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--      Company            : Delft University of Technology
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--                         : Faculty EEMCS, Department ME&CE
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--                         : Systems and Circuits group
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--
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--      Description        : Configuration parameters for the design
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--
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----------------------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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package config_Pkg is
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    ----------------------------------------------------------------------------------------------
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    -- CORE PARAMETERS
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    ----------------------------------------------------------------------------------------------
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    -- Implement external interrupt
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    constant CFG_INTERRUPT : boolean := true;      -- Disable or enable external interrupt [0,1]
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     -- Implement hardware multiplier
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    constant CFG_USE_HW_MUL : boolean := true;     -- Disable or enable multiplier [0,1]
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    -- Implement hardware barrel shifter
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    constant CFG_USE_BARREL : boolean := true;     -- Disable or enable barrel shifter [0,1]
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    -- Debug mode
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    constant CFG_DEBUG : boolean := true;          -- Resets some extra registers for better readability
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                                                   -- and enables feedback (report) [0,1]
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                                                   -- Set CFG_DEBUG to zero to obtain best performance.
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    -- Memory parameters
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    constant CFG_DMEM_SIZE  : positive := 32;      -- Data memory bus size in 2LOG # elements
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    constant CFG_IMEM_SIZE  : positive := 16;      -- Instruction memory bus size in 2LOG # elements
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    constant CFG_BYTE_ORDER : boolean := true;     -- Switch between MSB (1, default) and LSB (0) byte order policy
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    -- Register parameters
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    constant CFG_REG_FORCE_ZERO : boolean := true; -- Force data to zero if register address is zero [0,1]
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    constant CFG_REG_FWD_WRB    : boolean := true; -- Forward writeback to loosen register memory requirements [0,1]
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    constant CFG_MEM_FWD_WRB    : boolean := true; -- Forward memory result in stead of introducing stalls [0,1]
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    ----------------------------------------------------------------------------------------------
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    -- CONSTANTS (currently not configurable / not tested)
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    ----------------------------------------------------------------------------------------------
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    constant CFG_DMEM_WIDTH : positive := 32;   -- Data memory width in bits
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    constant CFG_IMEM_WIDTH : positive := 32;   -- Instruction memory width in bits
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    constant CFG_GPRF_SIZE  : positive :=  5;   -- General Purpose Register File Size in 2LOG # elements
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    ----------------------------------------------------------------------------------------------
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    -- BUS PARAMETERS
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    ----------------------------------------------------------------------------------------------
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    type memory_map_type is array(natural range <>) of std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
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    constant CFG_NUM_SLAVES : positive := 2;
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    constant CFG_MEMORY_MAP : memory_map_type(0 to CFG_NUM_SLAVES) := (X"00000000", X"00FFFFFF", X"FFFFFFFF");
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end config_Pkg;

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