OpenCores
URL https://opencores.org/ocsvn/mblite/mblite/trunk

Subversion Repositories mblite

[/] [mblite/] [trunk/] [designs/] [core_decoder_wb/] [config_Pkg.vhd] - Blame information for rev 8

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 takar
----------------------------------------------------------------------------------------------
2
--
3
--      Input file         : config_Pkg.vhd
4
--      Design name        : config_Pkg
5
--      Author             : Tamar Kranenburg
6
--      Company            : Delft University of Technology
7
--                         : Faculty EEMCS, Department ME&CE
8
--                         : Systems and Circuits group
9
--
10
--      Description        : Configuration parameters for the design
11
--
12
----------------------------------------------------------------------------------------------
13
 
14 8 takar
library ieee;
15
use ieee.std_logic_1164.all;
16
use ieee.std_logic_unsigned.all;
17 2 takar
 
18 8 takar
package config_Pkg is
19 2 takar
 
20
    ----------------------------------------------------------------------------------------------
21
    -- CORE PARAMETERS
22
    ----------------------------------------------------------------------------------------------
23
    -- Implement external interrupt
24 8 takar
    constant CFG_INTERRUPT : boolean := true;      -- Disable or enable external interrupt [0,1]
25 2 takar
 
26
     -- Implement hardware multiplier
27 8 takar
    constant CFG_USE_HW_MUL : boolean := true;     -- Disable or enable multiplier [0,1]
28 2 takar
 
29
    -- Implement hardware barrel shifter
30 8 takar
    constant CFG_USE_BARREL : boolean := true;     -- Disable or enable barrel shifter [0,1]
31 2 takar
 
32
    -- Debug mode
33 8 takar
    constant CFG_DEBUG : boolean := true;          -- Resets some extra registers for better readability
34 2 takar
                                                   -- and enables feedback (report) [0,1]
35
                                                   -- Set CFG_DEBUG to zero to obtain best performance.
36
 
37
    -- Memory parameters
38 8 takar
    constant CFG_DMEM_SIZE  : positive := 32;      -- Data memory bus size in 2LOG # elements
39
    constant CFG_IMEM_SIZE  : positive := 16;      -- Instruction memory bus size in 2LOG # elements
40
    constant CFG_BYTE_ORDER : boolean := true;     -- Switch between MSB (1, default) and LSB (0) byte order policy
41 2 takar
 
42
    -- Register parameters
43 8 takar
    constant CFG_REG_FORCE_ZERO : boolean := true; -- Force data to zero if register address is zero [0,1]
44
    constant CFG_REG_FWD_WRB    : boolean := true; -- Forward writeback to loosen register memory requirements [0,1]
45
    constant CFG_MEM_FWD_WRB    : boolean := true; -- Forward memory result in stead of introducing stalls [0,1]
46 2 takar
 
47
    ----------------------------------------------------------------------------------------------
48
    -- CONSTANTS (currently not configurable / not tested)
49
    ----------------------------------------------------------------------------------------------
50 8 takar
    constant CFG_DMEM_WIDTH : positive := 32;   -- Data memory width in bits
51
    constant CFG_IMEM_WIDTH : positive := 32;   -- Instruction memory width in bits
52
    constant CFG_GPRF_SIZE  : positive :=  5;   -- General Purpose Register File Size in 2LOG # elements
53 2 takar
 
54
    ----------------------------------------------------------------------------------------------
55
    -- BUS PARAMETERS
56
    ----------------------------------------------------------------------------------------------
57
 
58 8 takar
    type memory_map_type is array(natural range <>) of std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
59
    constant CFG_NUM_SLAVES : positive := 2;
60
    constant CFG_MEMORY_MAP : memory_map_type(0 to CFG_NUM_SLAVES) := (X"00000000", X"00FFFFFF", X"FFFFFFFF");
61 2 takar
 
62 8 takar
end config_Pkg;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.