OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [sw/] [drivers/] [can.h] - Blame information for rev 164

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 36 rfajardo
struct can_type
2
{
3 53 ConX.
        unsigned char rtr;
4
        unsigned char len;
5
        unsigned short identifier;
6
        unsigned char data[8];
7 36 rfajardo
};
8
 
9
typedef struct can_type can_type;
10
 
11
#define CAN_BUF_LEN     10
12
 
13
void can_init(void);
14
void can_irq(void);
15
 
16
can_type * can_get(void);       //return pointer to first non read received data
17
 
18
int can_send_basic();           //return (-1) or length (still processing previous) or asserted
19
void can_abort(void);
20
 
21
//BOTH MODES
22
#define CAN_MODE            0x00
23
#define CAN_CMD             0x01
24
#define CAN_STATUS          0x02
25
#define IRQ_READ            0x03
26
 
27
#define CAN_ACPT_CODE0      0x04    //only writable while in reset mode
28
#define CAN_ACPT_MASK0      0x05    //only writable while in reset mode
29
 
30
#define CAN_BUS_TIMING_0    0x06    //only writable while in reset mode
31
#define CAN_BUS_TIMING_1    0x07    //only writable while in reset mode
32
 
33
#define CAN_BUS_CLKDIV      0x1F    //only writable while NOT in reset mode
34
 
35
#define CAN_TX_BUF          0x0A   //only accessable while NOT in reset mode
36
#define CAN_TX_LEN          10
37
 
38
#define CAN_RX_BUF          0x14   //free read access for basic mode
39
#define CAN_RX_LEN          10
40
 
41
//only accessable while in reset mode
42
#define CAN_BUS_MODE        0x1F
43
 
44
 
45
//EXTENDED MODE ONLY
46
//only for extended mode & only accessable while in reset mode
47
#define CAN_IRQ_EN_EXT      0x04    //also writable if NOT in reset mode 
48
 
49
//read only regs
50
#define CAN_ARBIT_LOSS_CNT          0x0B    //cnt of arbitration loss
51
#define CAN_ERROR_CAPTURE_CODE      0x0C
52
#define CAN_RX_MSG_CNT              0x1D
53
//~read only regs
54
 
55
#define CAN_ERROR_WARN_LIMIT        0x0D
56
 
57
#define CAN_RX_ERR_CNT      0x0E
58
#define CAN_TX_ERR_CNT      0x0F
59
 
60
#define CAN_ACPT_CODE0_EXT  0x10    //also writable if NOT in reset mode
61
#define CAN_ACPT_CODE1      0x11
62
#define CAN_ACPT_CODE2      0x12
63
#define CAN_ACPT_CODE3      0x13
64
 
65
#define CAN_ACPT_MASK0_EXT  0x14    //also writable if NOT in reset mode
66
#define CAN_ACPT_MASK1      0x15
67
#define CAN_ACPT_MASK2      0x16
68
#define CAN_ACPT_MASK3      0x17
69
 
70
#define CAN_TX_BUF_EXT      0x10   //accessable if transmit_buffer_status=1 
71
#define CAN_TX_LEN_EXT      13     //ignores reset mode
72
 
73
#define CAN_RX_BUF_EXT      0x10   //read access only in NOT reset mode
74
#define CAN_RX_LEN_EXT      13
75
 
76
 
77
//BITS DEFINITIONS
78
 
79
//BASIC MODE
80
#define CAN_MODE_RESET             0x01
81
#define CAN_MODE_LISTEN_ONLY_BASIC 0x20
82
#define CAN_MODE_RECV_IRQ_EN       0x02
83
#define CAN_MODE_TX_IRQ_EN         0x04
84
#define CAN_MODE_ERROR_IRQ_EN      0x08
85
#define CAN_MODE_OVERRUN_IRQ_EN    0x10
86
//EXTENDED MODE
87
#define CAN_MODE_LISTEN_ONLY_EXT   0x02
88
#define CAN_MODE_SELF_TEST_MODE    0x04
89
#define CAN_MODE_ACPT_FILTER_MODE  0x08
90
 
91
//CMD
92
#define CAN_CMD_CLR_DATA_OVERRUN   0x08
93
#define CAN_CMD_RELEASE_BUFFER     0x04
94
#define CAN_CMD_TX_REQ             0x11
95
#define CAN_CMD_ABORT_TX           0x02
96
 
97
//STATUS
98
#define CAN_STATUS_NODE_BUS_OFF    0x80
99
#define CAN_STATUS_ERROR           0x40
100
#define CAN_STATUS_TX              0x20
101
#define CAN_STATUS_RX              0x10
102
#define CAN_STATUS_TX_COMPLETE     0x08
103
#define CAN_STATUS_TX_BUF          0x04
104
#define CAN_STATUS_OVERRUN         0x02
105
#define CAN_STATUS_RX_BUF          0x01
106
 
107
//IRQ READ
108
#define CAN_IRQ_READ_BUS_ERROR          0x80
109
#define CAN_IRQ_READ_ARBIT_LOST         0x40
110
#define CAN_IRQ_READ_ERROR_PASSIV       0x20
111
#define CAN_IRQ_READ_OVERRUN            0x08
112
#define CAN_IRQ_READ_ERROR              0x04
113
#define CAN_IRQ_READ_TX                 0x02
114
#define CAN_IRQ_READ_RX                 0x01
115
 
116
//BUS_TIMING_0
117
#define CAN_BUS_TIMING_0_SYNC_JMP_SHIFT     6
118
#define CAN_BUS_TIMING_0_SYNC_JMP           0xC0
119
#define CAN_BUS_TIMING_0_BAUD_PRESC         0x3F
120
 
121
//BUS_TIMING_1
122
#define CAN_BUS_TIMING_1_TRIPLE_SAMP_SHIFT  7
123
#define CAN_BUS_TIMING_1_TRIPLE_SAMP        0x80
124
#define CAN_BUS_TIMING_1_TIME_SEG2_SHIFT    4
125
#define CAN_BUS_TIMING_1_TIME_SEG2          0x70
126
#define CAN_BUS_TIMING_1_TIME_SEG1          0x0F
127
 
128
//CLKDIV
129
//only writable while NOT in reset mode
130
#define CAN_BUS_CLKDIV_MASK                 0x07
131
 
132
 
133
//EXTENDED MODE ONLY
134
//CLKMODE
135
//only writable while in reset mode
136
#define CAN_BUS_MODE_CLOCK_OFF              0x08
137
#define CAN_BUS_MODE_EXTENDED_MODE          0x80
138
 
139
//EXTENDED MODE IRQ
140
#define CAN_IRQ_EN_EXT_BUS_ERROR          0x80
141
#define CAN_IRQ_EN_EXT_ARBIT_LOST         0x40
142
#define CAN_IRQ_EN_EXT_ERROR_PASSIV       0x20
143
#define CAN_IRQ_EN_EXT_OVERRUN            0x08
144
#define CAN_IRQ_EN_EXT_ERROR              0x04
145
#define CAN_IRQ_EN_EXT_TX                 0x02
146
#define CAN_IRQ_EN_EXT_RX                 0x01
147
 
148
//EXTENDED ERROR CODES
149 53 ConX.
#define CAN_ERROR_CAPTURE_CODE_TYPE_SHIFT         6
150
#define CAN_ERROR_CAPTURE_CODE_TYPE               0xC0
151
#define CAN_ERROR_CAPTURE_CODE_TYPE_BIT           0x0
152
#define CAN_ERROR_CAPTURE_CODE_TYPE_FORM          0x1
153
#define CAN_ERROR_CAPTURE_CODE_TYPE_STUFF         0x2
154
#define CAN_ERROR_CAPTURE_CODE_TYPE_OTHER         0x3
155
#define CAN_ERROR_CAPTURE_CODE_DIR                0x40  //1 = TX | 0 = RX
156
#define CAN_ERROR_CAPTURE_CODE_SEG                0x1F

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.