OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [doc/] [src/] [cited.bib] - Blame information for rev 47

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 47 JonasDC
@article{MontModMul,
2
        author = {Peter L. Montgomery },
3
        title = {Modular Multiplication Without Trail Division},
4
        year = {1985},
5
        journal = {Mathematics of Computation},
6
        volume = {44},
7
        number = {170},
8
        pages = {519-521}
9
}
10
 
11
@article{NedMour,
12
        author = {Nedjah N. de Macedo Mourelle L.},
13
        title = {Three Hardware Architectures for the Binary Modular Exponentiation: Sequential, Parallel, and Systolic},
14
        journal = {IEEE Transactions on Circuits and Systems - I: Regular Papers},
15
        volume = {53},
16
        number = {3},
17
        pages = {627-633},
18
        year = {2006}
19
}
20
 
21
@misc{XilinxPLB,
22
        author = {Xilinx},
23
        title = {PLBV46 SLAVE SINGLE (v1.01a) DS561},
24
        howpublished = {\url{http://www.xilinx.com/support/documentation/ip_documentation/plbv46_slave_single.pdf}}
25
}
26
 
27
@misc{XilinxIntr,
28
        author = {Xilinx},
29
        title = {Interrupt Control (v2.01a) DS516},
30
        howpublished = {\url{http://www.xilinx.com/support/documentation/ip_documentation/interrupt_control.pdf}}
31
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.