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[/] [oc_axi_bfm/] [trunk/] [example/] [avalon_dma_tb.v] - Blame information for rev 2

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1 2 jackfrye11 
// avalon_dma_tb.v
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// Generated using ACDS version 19.1 670
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`timescale 1 ps / 1 ps
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module avalon_dma_tb (
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        );
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  integer i;
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  reg [31:0] i_r;
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  reg   [0:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5_r;
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  reg   [0:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_2_r;
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  reg  [31:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_3_r;
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  reg  [31:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_r;
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        wire         avalon_dma_inst_clk_bfm_clk_clk;                                   // avalon_dma_inst_clk_bfm:clk -> [avalon_dma_inst:clk_clk, avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm:clk, avalon_dma_inst_reset_bfm:clk]
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        wire         avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_4;             // avalon_dma_inst:oc_axi_lite_bfm_0_driver_new_signal_4 -> avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm:sig_new_signal_4
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        wire   [0:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5; // avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm:sig_new_signal_5 -> avalon_dma_inst:oc_axi_lite_bfm_0_driver_new_signal_5
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        wire  [31:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_1;             // avalon_dma_inst:oc_axi_lite_bfm_0_driver_new_signal_1 -> avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm:sig_new_signal_1
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        wire   [0:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_2; // avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm:sig_new_signal_2 -> avalon_dma_inst:oc_axi_lite_bfm_0_driver_new_signal_2
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        wire  [31:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_3; // avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm:sig_new_signal_3 -> avalon_dma_inst:oc_axi_lite_bfm_0_driver_new_signal_3
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        wire  [31:0] avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal;   // avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm:sig_new_signal -> avalon_dma_inst:oc_axi_lite_bfm_0_driver_new_signal
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        wire         avalon_dma_inst_reset_bfm_reset_reset;                             // avalon_dma_inst_reset_bfm:reset -> avalon_dma_inst:reset_reset_n
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  assign avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5 = avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5_r;
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  assign avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_2 = avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_2_r;
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  assign avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_3 = avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_3_r;
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  assign avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal   = avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_r;
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        avalon_dma avalon_dma_inst (
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                .clk_clk                               (avalon_dma_inst_clk_bfm_clk_clk),                                   //                      clk.clk
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                .oc_axi_lite_bfm_0_driver_new_signal   (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal),   // oc_axi_lite_bfm_0_driver.new_signal
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                .oc_axi_lite_bfm_0_driver_new_signal_1 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_1),             //                         .new_signal_1
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                .oc_axi_lite_bfm_0_driver_new_signal_2 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_2), //                         .new_signal_2
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                .oc_axi_lite_bfm_0_driver_new_signal_3 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_3), //                         .new_signal_3
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                .oc_axi_lite_bfm_0_driver_new_signal_4 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_4),             //                         .new_signal_4
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                .oc_axi_lite_bfm_0_driver_new_signal_5 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5), //                         .new_signal_5
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                .reset_reset_n                         (avalon_dma_inst_reset_bfm_reset_reset)                              //                    reset.reset_n
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        );
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        altera_avalon_clock_source #(
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                .CLOCK_RATE (50000000),
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                .CLOCK_UNIT (1)
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        ) avalon_dma_inst_clk_bfm (
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                .clk (avalon_dma_inst_clk_bfm_clk_clk)  // clk.clk
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        );
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/*
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        altera_conduit_bfm avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm (
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                .clk              (avalon_dma_inst_clk_bfm_clk_clk),                                   //     clk.clk
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                .sig_new_signal   (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal),   // conduit.new_signal
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                .sig_new_signal_1 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_1),             //        .new_signal_1
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                .sig_new_signal_2 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_2), //        .new_signal_2
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                .sig_new_signal_3 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_3), //        .new_signal_3
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                .sig_new_signal_4 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_4),             //        .new_signal_4
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                .sig_new_signal_5 (avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5), //        .new_signal_5
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                .reset            (1'b0)                                                               // (terminated)
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        );
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*/
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        altera_avalon_reset_source #(
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                .ASSERT_HIGH_RESET    (0),
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                .INITIAL_RESET_CYCLES (50)
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        ) avalon_dma_inst_reset_bfm (
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                .reset (avalon_dma_inst_reset_bfm_reset_reset), // reset.reset_n
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                .clk   (avalon_dma_inst_clk_bfm_clk_clk)        //   clk.clk
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        );
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/*
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                .addr             (oc_axi_lite_bfm_0_driver_new_signal),   //  driver.new_signal
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                .r_data           (oc_axi_lite_bfm_0_driver_new_signal_1), //        .new_signal_1
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                .transaction_type (oc_axi_lite_bfm_0_driver_new_signal_2), //        .new_signal_2
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                .w_data           (oc_axi_lite_bfm_0_driver_new_signal_3), //        .new_signal_3
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                .done             (oc_axi_lite_bfm_0_driver_new_signal_4), //        .new_signal_4
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                .start            (oc_axi_lite_bfm_0_driver_new_signal_5), //        .new_signal_5
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*/
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  initial begin
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    #2000000
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    i_r = 32'h00000000;
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    for(i = 0; i < 4096; i=i+4)
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    begin
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      write(i_r, 32'hdeadbeef);
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      i_r = i_r + 4;
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    end
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    write(32'h00002004, 32'h00000000); // read address
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    write(32'h00002008, 32'h00001000); // write address
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    write(32'h0000200C, 32'h00001000); // length
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    write(32'h00002018, 32'h0000000a); // GO and WORD
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  end
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  task write;
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    input [31:0] addr;
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    input [31:0] data;
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    begin
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      $display("In task\n");
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      avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_r = addr;       //addr
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      avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_3_r = data;     // data
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      avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_2_r  = 1'b0;    // write - transaction type
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      avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5_r = 1'b1;     // start
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      wait(avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_4);      // done
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      avalon_dma_inst_oc_axi_lite_bfm_0_driver_bfm_conduit_new_signal_5_r = 1'b0;     // start
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      wait(~avalon_dma_inst_oc_axi_lite_bfm_0_driver_new_signal_4);     // done
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    end
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  endtask
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endmodule

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