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[/] [orsoc_graphics_accelerator/] [trunk/] [rtl/] [verilog/] [gfx/] [gfx_transform.v] - Blame information for rev 6

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1 6 Orka 
/*
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ORSoC GFX accelerator core
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Copyright 2012, ORSoC, Per Lenander, Anton Fosselius.
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TRANSFORMATION PROCESSING MODULE
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 This file is part of orgfx.
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 orgfx is free software: you can redistribute it and/or modify
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 it under the terms of the GNU Lesser General Public License as published by
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 the Free Software Foundation, either version 3 of the License, or
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 (at your option) any later version.
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 orgfx is distributed in the hope that it will be useful,
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 but WITHOUT ANY WARRANTY; without even the implied warranty of
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 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 GNU Lesser General Public License for more details.
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 You should have received a copy of the GNU Lesser General Public License
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 along with orgfx.  If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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Input matrix M:
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    | aa ab ac tx |
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M = | ba bb bc ty |
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    | ca cb cc tz |
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Input point X:
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    | x |
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X = | y |
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    | z |
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    | 1 |
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Output point X':
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     | x' |        | aa*x + ab*y + ac*z + tx |
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X' = | y' | = MX = | ba*x + bb*y + bc*z + ty |
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     | z' |        | ca*x + cb*y + cc*z + tz |
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*/
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/* Transforms points with a 4x3 matrix */
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module gfx_transform(clk_i, rst_i,
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// Input point
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x_i, y_i, z_i, point_id_i,
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// Matrix
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aa, ab, ac, tx, ba, bb, bc, ty, ca, cb, cc, tz, // TODO: Make signed
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// Output points
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p0_x_o, p0_y_o, p0_z_o, p1_x_o, p1_y_o, p1_z_o, p2_x_o, p2_y_o, p2_z_o,
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transform_i, forward_i,
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ack_o
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);
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input clk_i;
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input rst_i;
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parameter point_width = 16;
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parameter subpixel_width = 16;
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input signed [point_width-1:-subpixel_width] x_i;
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input signed [point_width-1:-subpixel_width] y_i;
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input signed [point_width-1:-subpixel_width] z_i;
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input                                  [1:0] point_id_i; // point 0,1,2
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input signed [point_width-1:-subpixel_width] aa;
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input signed [point_width-1:-subpixel_width] ab;
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input signed [point_width-1:-subpixel_width] ac;
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input signed [point_width-1:-subpixel_width] tx;
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input signed [point_width-1:-subpixel_width] ba;
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input signed [point_width-1:-subpixel_width] bb;
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input signed [point_width-1:-subpixel_width] bc;
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input signed [point_width-1:-subpixel_width] ty;
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input signed [point_width-1:-subpixel_width] ca;
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input signed [point_width-1:-subpixel_width] cb;
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input signed [point_width-1:-subpixel_width] cc;
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input signed [point_width-1:-subpixel_width] tz;
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output reg signed [point_width-1:-subpixel_width] p0_x_o;
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output reg signed [point_width-1:-subpixel_width] p0_y_o;
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output reg signed               [point_width-1:0] p0_z_o;
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output reg signed [point_width-1:-subpixel_width] p1_x_o;
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output reg signed [point_width-1:-subpixel_width] p1_y_o;
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output reg signed               [point_width-1:0] p1_z_o;
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output reg signed [point_width-1:-subpixel_width] p2_x_o;
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output reg signed [point_width-1:-subpixel_width] p2_y_o;
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output reg signed               [point_width-1:0] p2_z_o;
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input transform_i, forward_i;
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output reg ack_o;
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reg [1:0] state;
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parameter wait_state = 2'b00, forward_state = 2'b01, transform_state = 2'b10;
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reg signed [2*point_width-1:-subpixel_width*2] aax;
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reg signed [2*point_width-1:-subpixel_width*2] aby;
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reg signed [2*point_width-1:-subpixel_width*2] acz;
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reg signed [2*point_width-1:-subpixel_width*2] bax;
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reg signed [2*point_width-1:-subpixel_width*2] bby;
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reg signed [2*point_width-1:-subpixel_width*2] bcz;
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reg signed [2*point_width-1:-subpixel_width*2] cax;
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reg signed [2*point_width-1:-subpixel_width*2] cby;
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reg signed [2*point_width-1:-subpixel_width*2] ccz;
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always @(posedge clk_i or posedge rst_i)
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if(rst_i)
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begin
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  // Initialize registers
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  ack_o             <= 1'b0;
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  p0_x_o            <= 1'b0;
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  p0_y_o            <= 1'b0;
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  p0_z_o            <= 1'b0;
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  p1_x_o            <= 1'b0;
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  p1_y_o            <= 1'b0;
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  p1_z_o            <= 1'b0;
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  p2_x_o            <= 1'b0;
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  p2_y_o            <= 1'b0;
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  p2_z_o            <= 1'b0;
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  aax               <= 1'b0;
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  aby               <= 1'b0;
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  acz               <= 1'b0;
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  bax               <= 1'b0;
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  bby               <= 1'b0;
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  bcz               <= 1'b0;
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  cax               <= 1'b0;
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  cby               <= 1'b0;
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  ccz               <= 1'b0;
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end
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else
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  case(state)
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    wait_state:
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    begin
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      ack_o <= 1'b0;
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      // Begin transformation
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      if(transform_i)
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      begin
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        aax <= aa * x_i;
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        aby <= ab * y_i;
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        acz <= ac * z_i;
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        bax <= ba * x_i;
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        bby <= bb * y_i;
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        bcz <= bc * z_i;
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        cax <= ca * x_i;
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        cby <= cb * y_i;
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        ccz <= cc * z_i;
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      end
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      // Forward the point
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      else if(forward_i)
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      begin
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        if(point_id_i == 2'b00)
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        begin
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          p0_x_o <= x_i;
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          p0_y_o <= y_i;
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          p0_z_o <= z_i[point_width-1:0];
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        end
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        else if(point_id_i == 2'b01)
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        begin
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          p1_x_o <= x_i;
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          p1_y_o <= y_i;
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          p1_z_o <= z_i[point_width-1:0];
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        end
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        else if(point_id_i == 2'b10)
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        begin
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          p2_x_o <= x_i;
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          p2_y_o <= y_i;
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          p2_z_o <= z_i[point_width-1:0];
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        end
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      end
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    end
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    forward_state:
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      ack_o <= 1'b1;
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    transform_state:
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    begin
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      ack_o <= 1'b1;
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      if(point_id_i == 2'b00)
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        begin
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          p0_x_o <= x_prime_trunc;
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          p0_y_o <= y_prime_trunc;
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          p0_z_o <= z_prime_trunc[point_width-1:0];
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        end
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        else if(point_id_i == 2'b01)
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        begin
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          p1_x_o <= x_prime_trunc;
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          p1_y_o <= y_prime_trunc;
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          p1_z_o <= z_prime_trunc[point_width-1:0];
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        end
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        else if(point_id_i == 2'b10)
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        begin
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          p2_x_o <= x_prime_trunc;
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          p2_y_o <= y_prime_trunc;
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          p2_z_o <= z_prime_trunc[point_width-1:0];
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        end
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    end
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  endcase
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wire [subpixel_width-1:0] zeroes = 1'b0;
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wire signed [2*point_width-1:-subpixel_width*2] x_prime = aax + aby + acz + {tx,zeroes};
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wire signed [2*point_width-1:-subpixel_width*2] y_prime = bax + bby + bcz + {ty,zeroes};
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wire signed [2*point_width-1:-subpixel_width*2] z_prime = cax + cby + ccz + {tz,zeroes};
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wire signed [point_width-1:-subpixel_width] x_prime_trunc = x_prime[point_width-1:-subpixel_width];
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wire signed [point_width-1:-subpixel_width] y_prime_trunc = y_prime[point_width-1:-subpixel_width];
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wire signed [point_width-1:-subpixel_width] z_prime_trunc = z_prime[point_width-1:-subpixel_width];
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// State machine
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always @(posedge clk_i or posedge rst_i)
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if(rst_i)
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  state <= wait_state;
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else
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  case(state)
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    wait_state:
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      if(transform_i)
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        state <= transform_state;
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      else if(forward_i)
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        state <= forward_state;
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    forward_state:
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      state <= wait_state;
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    transform_state:
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      state <= wait_state;
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  endcase
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endmodule
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