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[/] [qaz_libs/] [trunk/] [axi4_lib/] [sim/] [src/] [legacy/] [axi4_bfm_pkg.sv] - Blame information for rev 50

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1 45 qaztronic
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
4
////                                                              ////
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//// This source file may be used and distributed without         ////
6
//// restriction provided that this copyright statement is not    ////
7
//// removed from the file and that any derivative work contains  ////
8
//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
10
//// This source file is free software; you can redistribute it   ////
11
//// and/or modify it under the terms of the GNU Lesser General   ////
12
//// Public License as published by the Free Software Foundation; ////
13
//// either version 2.1 of the License, or (at your option) any   ////
14
//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
17
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
18
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
19
//// PURPOSE.  See the GNU Lesser General Public License for more ////
20
//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
23
//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
27
 
28
 
29
// --------------------------------------------------------------------
30
//
31
package axi4_bfm_pkg;
32
 
33
  // --------------------------------------------------------------------
34
  //
35
  import tb_bfm_pkg::*;
36
  import axi4_transaction_pkg::*;
37
 
38
 
39
  // --------------------------------------------------------------------
40
  //
41
  class ar_master_transaction_class #(A = 32, N = 8, I = 1)
42
    extends tb_blocking_transaction_q_class #(axi4_transaction_class #(.A(A), .N(N), .I(I)));
43
 
44
    virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m;
45
 
46
 
47
    //--------------------------------------------------------------------
48
    function new
49
      (
50
        virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m
51
      );
52
 
53
      super.new();
54
      this.axi4_m = axi4_m;
55
 
56
    endfunction: new
57
 
58
 
59
    // --------------------------------------------------------------------
60
    //
61
    function void
62
      ar_default;
63
 
64
      axi4_m.cb_m.araddr   <= 'bx;
65
      axi4_m.cb_m.arburst  <= 'bx;
66
      axi4_m.cb_m.arcache  <= 'bx;
67
      axi4_m.cb_m.arid     <= 'bx;
68
      axi4_m.cb_m.arlen    <= 'bx;
69
      axi4_m.cb_m.arlock   <= 'bx;
70
      axi4_m.cb_m.arprot   <= 'bx;
71
      axi4_m.cb_m.arqos    <= 'bx;
72
      axi4_m.cb_m.arregion <= 'bx;
73
      axi4_m.cb_m.arsize   <= 'bx;
74
      axi4_m.cb_m.arvalid  <= 0;
75
 
76
    endfunction: ar_default
77
 
78
 
79
    // --------------------------------------------------------------------
80
    //
81
    task automatic
82
      transaction
83
      (
84
        ref T tr_h
85
      );
86
 
87
      ->this.start;
88
 
89
      repeat(tr_h.delay_h.next()) @(axi4_m.cb_m);
90
 
91
      axi4_m.cb_m.araddr   <= tr_h.addr;
92
      axi4_m.cb_m.arid     <= tr_h.id;
93
      axi4_m.cb_m.arlen    <= tr_h.len;
94
      axi4_m.cb_m.arsize   <= tr_h.size;
95
 
96
      axi4_m.cb_m.arburst  <= tr_h.burst;
97
      axi4_m.cb_m.arcache  <= tr_h.cache;
98
      axi4_m.cb_m.arlock   <= tr_h.lock;
99
      axi4_m.cb_m.arprot   <= tr_h.prot;
100
      axi4_m.cb_m.arqos    <= tr_h.qos;
101
      axi4_m.cb_m.arregion <= tr_h.region;
102
      axi4_m.cb_m.arvalid  <= 1;
103
 
104
      $display("^^^ %16.t | %m | master AR transaction @ 0x%08x |", $time, tr_h.addr);
105
 
106
      repeat(1) @(axi4_m.cb_m);
107
      wait(axi4_m.cb_m.arready);
108
 
109
      axi4_m.zero_cycle_delay();
110
      ar_default();
111
 
112
      ->this.done;
113
 
114
    endtask: transaction
115
 
116
 
117
  // --------------------------------------------------------------------
118
  //
119
  endclass: ar_master_transaction_class
120
 
121
 
122
  // --------------------------------------------------------------------
123
  //
124
  class r_master_transaction_class #(A = 32, N = 8, I = 1)
125
    extends tb_blocking_transaction_q_class #(axi4_transaction_class #(.A(A), .N(N), .I(I)));
126
 
127
    virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m;
128
 
129
 
130
    //--------------------------------------------------------------------
131
    function new
132
      (
133
        virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m
134
      );
135
 
136
      super.new();
137
      this.axi4_m = axi4_m;
138
 
139
    endfunction: new
140
 
141
 
142
    // --------------------------------------------------------------------
143
    //
144
    function void
145
      r_default;
146
 
147
      axi4_m.cb_m.rready <= 0;
148
 
149
    endfunction: r_default
150
 
151
 
152
    // --------------------------------------------------------------------
153
    //
154
    task automatic
155
      transaction
156
      (
157
        ref T tr_h
158
      );
159
 
160
      ->this.start;
161
 
162
      tr_h.data_h = new(tr_h.len);
163
 
164
      foreach(tr_h.payload_h.w[i])
165
      begin
166
        repeat(tr_h.delay_h.next()) @(axi4_m.cb_m);
167
        axi4_m.cb_m.rready <= 1;
168
        repeat(1) @(axi4_m.cb_m);
169
 
170
        wait(axi4_m.cb_m.rvalid);
171
        axi4_m.zero_cycle_delay();
172
 
173
        tr_h.data_h.w[i] = axi4_m.cb_m.rdata;
174
 
175
        $display("^^^ %16.t | %m | master R transaction | %d | 0x%016x |", $time, i, tr_h.data_h.w[i]);
176
        r_default();
177
      end
178
 
179
      ->this.done;
180
 
181
    endtask: transaction
182
 
183
 
184
  // --------------------------------------------------------------------
185
  //
186
  endclass: r_master_transaction_class
187
 
188
 
189
  // --------------------------------------------------------------------
190
  //
191
  class aw_master_transaction_class #(A = 32, N = 8, I = 1)
192
    extends tb_blocking_transaction_q_class #(axi4_transaction_class #(.A(A), .N(N), .I(I)));
193
 
194
    virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m;
195
 
196
 
197
    //--------------------------------------------------------------------
198
    function new
199
      (
200
        virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m
201
      );
202
 
203
      super.new();
204
      this.axi4_m = axi4_m;
205
 
206
    endfunction: new
207
 
208
 
209
    // --------------------------------------------------------------------
210
    //
211
    function void
212
      aw_default;
213
 
214
      axi4_m.cb_m.awaddr   <= 'bx;
215
      axi4_m.cb_m.awburst  <= 'bx;
216
      axi4_m.cb_m.awcache  <= 'bx;
217
      axi4_m.cb_m.awid     <= 'bx;
218
      axi4_m.cb_m.awlen    <= 'bx;
219
      axi4_m.cb_m.awlock   <= 'bx;
220
      axi4_m.cb_m.awprot   <= 'bx;
221
      axi4_m.cb_m.awqos    <= 'bx;
222
      axi4_m.cb_m.awregion <= 'bx;
223
      axi4_m.cb_m.awsize   <= 'bx;
224
      axi4_m.cb_m.awvalid  <= 0;
225
 
226
    endfunction: aw_default
227
 
228
    // --------------------------------------------------------------------
229
    //
230
    task automatic
231
      transaction
232
      (
233
        ref T tr_h
234
      );
235
 
236
      ->this.start;
237
 
238
      repeat(tr_h.delay_h.next()) @(axi4_m.cb_m);
239
 
240
      axi4_m.cb_m.awaddr   <= tr_h.addr;
241
      axi4_m.cb_m.awid     <= tr_h.id;
242
      axi4_m.cb_m.awlen    <= tr_h.len;
243
      axi4_m.cb_m.awsize   <= tr_h.size;
244
 
245
      axi4_m.cb_m.awburst  <= tr_h.burst;
246
      axi4_m.cb_m.awcache  <= tr_h.cache;
247
      axi4_m.cb_m.awlock   <= tr_h.lock;
248
      axi4_m.cb_m.awprot   <= tr_h.prot;
249
      axi4_m.cb_m.awqos    <= tr_h.qos;
250
      axi4_m.cb_m.awregion <= tr_h.region;
251
      axi4_m.cb_m.awvalid  <= 1;
252
 
253
      $display("^^^ %16.t | %m | master AW transaction @ 0x%08x |", $time, tr_h.addr);
254
 
255
      repeat(1) @(axi4_m.cb_m);
256
      wait(axi4_m.cb_m.awready);
257
 
258
      axi4_m.zero_cycle_delay();
259
      aw_default();
260
 
261
      ->this.done;
262
 
263
    endtask: transaction
264
 
265
 
266
  // --------------------------------------------------------------------
267
  //
268
  endclass: aw_master_transaction_class
269
 
270
 
271
  // --------------------------------------------------------------------
272
  //
273
  class w_master_transaction_class #(A = 32, N = 8, I = 1)
274
    extends tb_blocking_transaction_q_class #(axi4_transaction_class #(.A(A), .N(N), .I(I)));
275
 
276
    virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m;
277
 
278
 
279
    //--------------------------------------------------------------------
280
    function new
281
      (
282
        virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m
283
      );
284
 
285
      super.new();
286
      this.axi4_m = axi4_m;
287
 
288
    endfunction: new
289
 
290
 
291
    // --------------------------------------------------------------------
292
    //
293
    function void
294
      w_default;
295
 
296
      axi4_m.cb_m.wdata    <= 'bx;
297
      axi4_m.cb_m.wlast    <= 'bx;
298
      axi4_m.cb_m.wstrb    <= {N{1'b1}};
299
      axi4_m.cb_m.wvalid   <= 0;
300
 
301
    endfunction: w_default
302
 
303
 
304
    // --------------------------------------------------------------------
305
    //
306
    task automatic
307
      transaction
308
      (
309
        ref T tr_h
310
      );
311
 
312
      ->this.start;
313
 
314
      foreach(tr_h.payload_h.w[i])
315
      begin
316
        repeat(tr_h.delay_h.next()) @(axi4_m.cb_m);
317
 
318
        axi4_m.cb_m.wdata  <= tr_h.payload_h.w[i];
319
        // axi4_m.cb_m.wstrb  <= tr_h.strb;    // need to fix
320
 
321
        if(i < tr_h.payload_h.w.size - 1)
322
          axi4_m.cb_m.wlast   <= 0;
323
        else
324
          axi4_m.cb_m.wlast   <= 1;
325
 
326
        axi4_m.cb_m.wvalid <= 1;
327
 
328
        repeat(1) @(axi4_m.cb_m);
329
        wait(axi4_m.cb_m.wready);
330
 
331
        axi4_m.zero_cycle_delay();
332
        $display("^^^ %16.t | %m | master W transaction | %d | 0x%016x |", $time, i, tr_h.payload_h.w[i]);
333
        w_default();
334
      end
335
 
336
      ->this.done;
337
 
338
    endtask: transaction
339
 
340
 
341
  // --------------------------------------------------------------------
342
  //
343
  endclass: w_master_transaction_class
344
 
345
 
346
  // --------------------------------------------------------------------
347
  //
348
  class b_master_transaction_class #(A = 32, N = 8, I = 1)
349
    extends tb_blocking_transaction_q_class #(axi4_transaction_class #(.A(A), .N(N), .I(I)));
350
 
351
    virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m;
352
 
353
 
354
    //--------------------------------------------------------------------
355
    function new
356
      (
357
        virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m
358
      );
359
 
360
      super.new();
361
      this.axi4_m = axi4_m;
362
 
363
    endfunction: new
364
 
365
 
366
    // --------------------------------------------------------------------
367
    //
368
    function void
369
      b_default;
370
 
371
      axi4_m.cb_m.bready   <= 0;
372
 
373
    endfunction: b_default
374
 
375
 
376
    // --------------------------------------------------------------------
377
    //
378
    task automatic
379
      transaction
380
      (
381
        ref T tr_h
382
      );
383
 
384
      ->this.start;
385
 
386
      repeat(tr_h.delay_h.next()) @(axi4_m.cb_m);
387
      axi4_m.cb_m.bready <= 1;
388
      repeat(1) @(axi4_m.cb_m);
389
 
390
      wait(axi4_m.cb_m.bvalid);
391
      axi4_m.zero_cycle_delay();
392
 
393
      $display("^^^ %16.t | %m | master B transaction | 0x%x |", $time, axi4_m.cb_m.bresp);
394
      b_default();
395
 
396
      ->this.done;
397
 
398
    endtask: transaction
399
 
400
 
401
  // --------------------------------------------------------------------
402
  //
403
  endclass: b_master_transaction_class
404
 
405
 
406
  // --------------------------------------------------------------------
407
  //
408
  class axi4_master_bfm_class #(A = 32, N = 8, I = 1);
409
 
410
    ar_master_transaction_class #(.A(A), .N(N), .I(I))  ar_h;
411
    r_master_transaction_class  #(.A(A), .N(N), .I(I))  r_h;
412
    aw_master_transaction_class #(.A(A), .N(N), .I(I))  aw_h;
413
    w_master_transaction_class #(.A(A), .N(N), .I(I))   w_h;
414
    b_master_transaction_class  #(.A(A), .N(N), .I(I))  b_h;
415
 
416
    axi4_transaction_class tr_h;
417
    virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m;
418
 
419
 
420
    //--------------------------------------------------------------------
421
    function new
422
      (
423
        virtual axi4_if  #(.A(A), .N(N), .I(I)) axi4_m
424
      );
425
 
426
      this.axi4_m = axi4_m;
427
 
428
      ar_h = new(axi4_m);
429
      r_h = new(axi4_m);
430
      aw_h = new(axi4_m);
431
      w_h = new(axi4_m);
432
      b_h = new(axi4_m);
433
 
434
      ar_h.init();
435
      ar_h.ar_default();
436
 
437
      r_h.init();
438
      r_h.r_default();
439
 
440
      aw_h.init();
441
      aw_h.aw_default();
442
 
443
      w_h.init();
444
      w_h.w_default();
445
 
446
      b_h.init();
447
      b_h.b_default();
448
 
449
    endfunction: new
450
 
451
 
452
    // --------------------------------------------------------------------
453
    //
454
    function void
455
      init;
456
 
457
    endfunction: init
458
 
459
 
460
    // --------------------------------------------------------------------
461
    //
462
    task
463
      basic_read
464
      (
465
        input   logic [(A-1):0]   araddr,
466
        input   logic [7:0]       arlen,
467
        output  logic [(8*N)-1:0] data[],
468
        output  logic [1:0]       rresp
469
      );
470
 
471
      this.tr_h = new;
472
      this.tr_h.basic_read(araddr, arlen);
473
 
474
      ar_h.put(tr_h);
475
      r_h.put(tr_h);
476
 
477
      @(r_h.done);
478
      data = tr_h.data_h.w;
479
      rresp = tr_h.resp;
480
 
481
    endtask: basic_read
482
 
483
 
484
    // --------------------------------------------------------------------
485
    //
486
    task
487
      basic_random_read_burst
488
      (
489
        output  logic [(8*N)-1:0] data[],
490
        output  logic [1:0]       rresp
491
      );
492
 
493
      this.tr_h = new;
494
      this.tr_h.basic_random_burst;
495
 
496
      ar_h.put(tr_h);
497
      r_h.put(tr_h);
498
 
499
      @(r_h.done);
500
      data = tr_h.data_h.w;
501
      rresp = tr_h.resp;
502
 
503
    endtask: basic_random_read_burst
504
 
505
 
506
    // --------------------------------------------------------------------
507
    //
508
    task
509
      basic_write
510
      (
511
        input   logic [(A-1):0]   awaddr,
512
        input   logic [7:0]       awlen,
513
        input   logic [(8*N)-1:0] data[],
514
        output  logic [1:0]       bresp
515
      );
516
 
517
      this.tr_h = new;
518
      this.tr_h.basic_write(awaddr, awlen);
519
 
520
      foreach(this.tr_h.payload_h.w[i])
521
        this.tr_h.payload_h.w[i] = data[i];
522
 
523
      aw_h.put(tr_h);
524
      w_h.put(tr_h);
525
      b_h.put(tr_h);
526
 
527
      @(b_h.done);
528
      bresp = tr_h.resp;
529
 
530
    endtask: basic_write
531
 
532
 
533
    // --------------------------------------------------------------------
534
    //
535
    task
536
      basic_random_write_burst
537
      (
538
        output  logic [1:0]       bresp
539
      );
540
 
541
      this.tr_h = new;
542
      this.tr_h.basic_random_burst;
543
 
544
      aw_h.put(tr_h);
545
      w_h.put(tr_h);
546
      b_h.put(tr_h);
547
 
548
      @(b_h.done);
549
      bresp = tr_h.resp;
550
 
551
    endtask: basic_random_write_burst
552
 
553
 
554
  // --------------------------------------------------------------------
555
  //
556
  endclass: axi4_master_bfm_class
557
 
558
 
559
// --------------------------------------------------------------------
560
//
561
endpackage: axi4_bfm_pkg
562
 
563
 

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