OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

[/] [qaz_libs/] [trunk/] [axi4_lite_lib/] [sim/] [tests/] [debug_axi4_lite_register_file/] [the_test.sv] - Blame information for rev 29

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 29 qaztronic
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
4
////                                                              ////
5
//// This source file may be used and distributed without         ////
6
//// restriction provided that this copyright statement is not    ////
7
//// removed from the file and that any derivative work contains  ////
8
//// the original copyright notice and the associated disclaimer. ////
9
////                                                              ////
10
//// This source file is free software; you can redistribute it   ////
11
//// and/or modify it under the terms of the GNU Lesser General   ////
12
//// Public License as published by the Free Software Foundation; ////
13
//// either version 2.1 of the License, or (at your option) any   ////
14
//// later version.                                               ////
15
////                                                              ////
16
//// This source is distributed in the hope that it will be       ////
17
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
18
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
19
//// PURPOSE.  See the GNU Lesser General Public License for more ////
20
//// details.                                                     ////
21
////                                                              ////
22
//// You should have received a copy of the GNU Lesser General    ////
23
//// Public License along with this source; if not, download it   ////
24
//// from http://www.opencores.org/lgpl.shtml                     ////
25
////                                                              ////
26
//////////////////////////////////////////////////////////////////////
27
 
28
`timescale 1ps/1ps
29
 
30
 
31
module
32
  the_test(
33
            input tb_clk,
34
            input tb_rst
35
          );
36
 
37
  // --------------------------------------------------------------------
38
  //
39
  localparam A = tb_top.A;
40
  localparam N = tb_top.N;
41
 
42
 
43
  // --------------------------------------------------------------------
44
  //
45
  import axi4_transaction_pkg::*;
46
  axi4_payload_class payload_h;
47
 
48
 
49
  // --------------------------------------------------------------------
50
  //
51
  logic [(8*N)-1:0] data[];
52
  logic [1:0] resp;
53
 
54
  task run_the_test;
55
 
56
    // --------------------------------------------------------------------
57
    // insert test below
58
    // --------------------------------------------------------------------
59
    $display("^^^---------------------------------");
60
    $display("^^^ %16.t | Testbench begun.\n", $time);
61
    $display("^^^---------------------------------");
62
    // --------------------------------------------------------------------
63
 
64
    tb_top.tb.timeout_stop(20us);
65
    // tb_top.tb.timeout_stop(300ns);
66
 
67
 
68
    // --------------------------------------------------------------------
69
    wait(~tb_rst);
70
    data = new[1];
71
 
72
 
73
    // --------------------------------------------------------------------
74
    #100ns;
75
 
76
    data[0] = 32'h_abba_beef;
77
    tb_top.bfm.basic_write(32'h1234_0000, data, resp);
78
 
79
    // --------------------------------------------------------------------
80
    #100ns;
81
 
82
    data[0] = 32'h_cafe_1a7e;
83
    tb_top.bfm.basic_write(32'h1234_0004, data, resp);
84
 
85
    // --------------------------------------------------------------------
86
    #100ns;
87
 
88
    data[0] = 32'h_0123_4567;
89
    tb_top.bfm.basic_write(32'h1234_0008, data, resp);
90
 
91
    // --------------------------------------------------------------------
92
    #100ns;
93
 
94
    data[0] = 32'h_89ab_cdef;
95
    tb_top.bfm.basic_write(32'h1234_000c, data, resp);
96
 
97
    // --------------------------------------------------------------------
98
    #100ns;
99
 
100
    for(int i = 0; i < 4*4; i += 4)
101
    begin
102
      tb_top.bfm.basic_read(32'h1234_0000 + i, data, resp);
103
      $display("^^^ %16.t | 0x%08x |", $time, data[0]);
104
    end
105
 
106
    // --------------------------------------------------------------------
107
    #100ns;
108
 
109
    for(int i = 0; i < 8*4; i += 4)
110
      tb_top.bfm.basic_random_write(32'habcd_0000 + i, resp);
111
 
112
    // --------------------------------------------------------------------
113
    #100ns;
114
 
115
    for(int i = 0; i < 8*4; i += 4)
116
    begin
117
      tb_top.bfm.basic_read(32'habcd_0000 + i, data, resp);
118
      $display("^^^ %16.t | 0x%08x |", $time, data[0]);
119
    end
120
 
121
    // --------------------------------------------------------------------
122
    #150ns;
123
 
124
 
125
    // --------------------------------------------------------------------
126
    // insert test above
127
    // --------------------------------------------------------------------
128
 
129
  endtask
130
 
131
 
132
endmodule
133
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.