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[/] [qaz_libs/] [trunk/] [camera_link/] [camera_link.v] - Blame information for rev 21

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Line No. Rev Author Line
1 2 qaztronic
//
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//
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//
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module camera_link
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(
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  input [3:0] x_data_in,
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  input       x_clk,
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  input [3:0] y_data_in,
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  input       y_clk,
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  input [3:0] z_data_in,
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  input       z_clk,
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  input       reset
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);
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  // --------------------------------------------------------------------
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  //
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  wire  [27:0]  x_data_out;
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  wire          x_dval      = x_data_out[26];
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  wire          x_fval      = x_data_out[25];
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  wire          x_lval      = x_data_out[24];
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  wire          x_spare     = x_data_out[23];
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  channel_link
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    i_channel_link_x
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      (
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          .clk_in(x_clk),
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          .data_in(x_data_in),
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          .data_out(x_data_out),
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          .reset(reset)
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      );
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  // --------------------------------------------------------------------
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  //
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  wire  [27:0]  y_data_out;
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  wire          y_dval      = y_data_out[26];
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  wire          y_fval      = y_data_out[25];
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  wire          y_lval      = y_data_out[24];
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  wire          y_spare     = y_data_out[23];
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  channel_link
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    i_channel_link_y
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      (
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          .clk_in(y_clk),
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          .data_in(y_data_in),
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          .data_out(y_data_out),
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          .reset(reset)
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      );
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  // --------------------------------------------------------------------
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  //
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  wire  [27:0]  z_data_out;
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  wire          z_dval      = z_data_out[26];
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  wire          z_fval      = z_data_out[25];
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  wire          z_lval      = z_data_out[24];
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  wire          z_spare     = z_data_out[23];
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  channel_link
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    i_channel_link_z
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      (
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          .clk_in(z_clk),
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          .data_in(z_data_in),
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          .data_out(z_data_out),
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          .reset(reset)
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      );
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  // --------------------------------------------------------------------
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  //
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  wire [7:0] cl_port_a = { x_data_out[5], x_data_out[27], x_data_out[6], x_data_out[4:0] };
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  wire [7:0] cl_port_b = { x_data_out[11], x_data_out[10], x_data_out[14:12], x_data_out[9:7] };
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  wire [7:0] cl_port_c = { x_data_out[17:16], x_data_out[22:18], x_data_out[15] };
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  wire [7:0] cl_port_d = { y_data_out[5], y_data_out[27], y_data_out[6], y_data_out[4:0] };
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  wire [7:0] cl_port_e = { y_data_out[11], y_data_out[10], y_data_out[14:12], y_data_out[9:7] };
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  wire [7:0] cl_port_f = { y_data_out[17:16], y_data_out[22:18], y_data_out[15] };
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  wire [7:0] cl_port_g = { z_data_out[5], z_data_out[27], z_data_out[6], z_data_out[4:0] };
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  wire [7:0] cl_port_h = { z_data_out[11], z_data_out[10], z_data_out[14:12], z_data_out[9:7] };
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  wire [13:0] fpa_pixel_0 = { cl_port_a[5:0], cl_port_b };
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  wire [13:0] fpa_pixel_1 = { cl_port_c[5:0], cl_port_d };
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  wire [13:0] fpa_pixel_2 = { cl_port_e[5:0], cl_port_f };
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  wire [13:0] fpa_pixel_3 = { cl_port_g[5:0], cl_port_h };
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endmodule
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