OpenCores
URL https://opencores.org/ocsvn/robust_axi_fabric/robust_axi_fabric/trunk

Subversion Repositories robust_axi_fabric

[/] [robust_axi_fabric/] [trunk/] [src/] [base/] [ic_dec.v] - Blame information for rev 13

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 7 eyalhoc
<##//////////////////////////////////////////////////////////////////
2
////                                                             ////
3
////  Author: Eyal Hochberg                                      ////
4
////          eyal@provartec.com                                 ////
5
////                                                             ////
6
////  Downloaded from: http://www.opencores.org                  ////
7
/////////////////////////////////////////////////////////////////////
8
////                                                             ////
9
//// Copyright (C) 2010 Provartec LTD                            ////
10
//// www.provartec.com                                           ////
11
//// info@provartec.com                                          ////
12
////                                                             ////
13
//// This source file may be used and distributed without        ////
14
//// restriction provided that this copyright statement is not   ////
15
//// removed from the file and that any derivative work contains ////
16
//// the original copyright notice and the associated disclaimer.////
17
////                                                             ////
18
//// This source file is free software; you can redistribute it  ////
19
//// and/or modify it under the terms of the GNU Lesser General  ////
20
//// Public License as published by the Free Software Foundation.////
21
////                                                             ////
22
//// This source is distributed in the hope that it will be      ////
23
//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
24
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR     ////
25
//// PURPOSE.  See the GNU Lesser General Public License for more////
26
//// details. http://www.gnu.org/licenses/lgpl.html              ////
27
////                                                             ////
28
//////////////////////////////////////////////////////////////////##>
29
 
30 2 eyalhoc
OUTFILE PREFIX_ic_dec.v
31
 
32
ITER MX
33
ITER SX
34
 
35
LOOP MX
36
ITER MMX_IDX
37
ENDLOOP MX
38
 
39
module PREFIX_ic_dec (PORTS);
40
 
41
   input [ADDR_BITS-1:0]                       MMX_AADDR;
42
   input [ID_BITS-1:0]                         MMX_AID;
43
   output [SLV_BITS-1:0]                       MMX_ASLV;
44
   output                                     MMX_AIDOK;
45
 
46
   parameter                                  DEC_MSB =  ADDR_BITS - 1;
47 9 eyalhoc
   parameter                                  DEC_LSB =  ADDR_BITS - SLV_BITS;
48 2 eyalhoc
 
49
   reg [SLV_BITS-1:0]                          MMX_ASLV;
50
   reg                                        MMX_AIDOK;
51
 
52
   LOOP MX
53
     always @(MMX_AADDR or MMX_AIDOK)
54 13 eyalhoc
       begin
55
IFDEF TRUE(SLAVE_NUM==1)
56
          case (MMX_AIDOK)
57
            1'b1 : MMX_ASLV = 'd0;
58
ELSE TRUE(SLAVE_NUM==1)
59 2 eyalhoc
          case ({MMX_AIDOK, MMX_AADDR[DEC_MSB:DEC_LSB]})
60 9 eyalhoc
            {1'b1, BIN(SX SLV_BITS)} : MMX_ASLV = 'dSX;
61 13 eyalhoc
ENDIF TRUE(SLAVE_NUM==1)
62 8 eyalhoc
            default : MMX_ASLV = 'dSERR;
63 2 eyalhoc
          endcase
64
       end
65
 
66
   always @(MMX_AID)
67
     begin
68
        case (MMX_AID)
69
          ID_MMX_IDMMX_IDX : MMX_AIDOK = 1'b1;
70
          default : MMX_AIDOK = 1'b0;
71
        endcase
72
     end
73
 
74
   ENDLOOP MX
75
 
76
     endmodule
77
 
78
 
79
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.