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[/] [s6soc/] [trunk/] [bench/] [cpp/] [Makefile] - Blame information for rev 10

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1 2 dgisselq
################################################################################
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#
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# Filename:     Makefile
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#
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# Project:      Zip CPU -- a small, lightweight, RISC CPU soft core
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#
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# Purpose:      This makefile builds the final verilator simulation of the
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#               zipsystem.  Specifically, it builds the final C++ portion
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#               of the simulator, and thus the final simulator executable.
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#
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#
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# Creator:      Dan Gisselquist, Ph.D.
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#               Gisselquist Technology, LLC
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#
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################################################################################
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#
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# Copyright (C) 2015, Gisselquist Technology, LLC
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#
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# This program is free software (firmware): you can redistribute it and/or
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# modify it under the terms of  the GNU General Public License as published
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# by the Free Software Foundation, either version 3 of the License, or (at
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# your option) any later version.
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#
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# This program is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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# for more details.
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#
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# License:      GPL, v3, as defined and found on www.gnu.org,
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#               http://www.gnu.org/licenses/gpl.html
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#
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#
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################################################################################
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#
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all: zip_sim
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CXX     := g++
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FLAGS   := -Wall -Og -g
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SWHOST  := ../../sw/host
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RTLD    := ../../rtl
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INCS    := -I$(RTLD)/obj_dir/ -I$(RTLD) -I/usr/share/verilator/include  \
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        -I$(SWHOST)
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SOURCES := zip_sim.cpp twoc.cpp qspiflashsim.cpp uartsim.cpp
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VLIB    := /usr/share/verilator/include/verilated.cpp
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RAWLIB  := $(VLIB) $(RTLD)/obj_dir/Vbusmaster__ALL.a
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LIBS    := $(RAWLIB) -lelf
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TESTF   := $(ZASM)/z.out
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DHRYSTONEF := ../asm/zipdhry.z
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zip_sim: $(SOURCES) $(RAWLIB) testb.h
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        $(CXX) $(FLAGS) $(INCS) $(SOURCES) $(LIBS) -o $@
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# .PHONY: stest
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# stest: zippy_tb
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        # ./zippy_tb -s $(TESTF)
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# .PHONY: itest
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# itest: zippy_tb
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        # ./zippy_tb $(TESTF)
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# .PHONY: test
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# test: zippy_tb stest
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        # ./zippy_tb -a $(TESTF)
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# .PHONY: dhrystone
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# dhrystone: zippy_tb
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        # ./zippy_tb -a $(DHRYSTONEF)
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.PHONY: clean
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clean:
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        rm ./zip_sim

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