OpenCores
URL https://opencores.org/ocsvn/s6soc/s6soc/trunk

Subversion Repositories s6soc

[/] [s6soc/] [trunk/] [sw/] [host/] [xpflashscop.cpp] - Blame information for rev 52

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 52 dgisselq
////////////////////////////////////////////////////////////////////////////////
2
//
3
// Filename:    xpflashscop.cpp
4
//
5
// Project:     CMod S6 System on a Chip, ZipCPU demonstration project
6
//
7
// Purpose:     To test the QSPI Xpress flash interface, to see what it is doing
8
//              on the chip, and to create a VCD file matching the wires
9
//      determined/seen from the chip.
10
//
11
// Creator:     Dan Gisselquist, Ph.D.
12
//              Gisselquist Technology, LLC
13
//
14
////////////////////////////////////////////////////////////////////////////////
15
//
16
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
17
//
18
// This program is free software (firmware): you can redistribute it and/or
19
// modify it under the terms of  the GNU General Public License as published
20
// by the Free Software Foundation, either version 3 of the License, or (at
21
// your option) any later version.
22
//
23
// This program is distributed in the hope that it will be useful, but WITHOUT
24
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
25
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
26
// for more details.
27
//
28
// You should have received a copy of the GNU General Public License along
29
// with this program.  (It's in the $(ROOT)/doc directory, run make with no
30
// target there if the PDF file isn't present.)  If not, see
31
// <http://www.gnu.org/licenses/> for a copy.
32
//
33
// License:     GPL, v3, as defined and found on www.gnu.org,
34
//              http://www.gnu.org/licenses/gpl.html
35
//
36
//
37
////////////////////////////////////////////////////////////////////////////////
38
//
39
//
40
//
41
//
42
#include <stdio.h>
43
#include <stdlib.h>
44
#include <unistd.h>
45
#include <strings.h>
46
#include <ctype.h>
47
#include <string.h>
48
#include <signal.h>
49
#include <assert.h>
50
 
51
#include "devbus.h"
52
 
53
#ifdef  SIMPLE_DEPPBUS
54
# include "deppbus.h"
55
#else
56
# include "llcomms.h"
57
# include "deppi.h"
58
# include "ttybus.h"
59
 
60
#endif
61
 
62
// #include "port.h"
63
#include "regdefs.h"
64
#include "scopecls.h"
65
 
66
#ifdef  SIMPLE_DEPPBUS
67
# define        FPGAOPEN(SN)    new DEPPBUS(SN);
68
#else
69
# define        FPGAOPEN(SN)    new FPGA(new DEPPI(SN))
70
#endif
71
 
72
FPGA    *m_fpga;
73
void    closeup(int v) {
74
        m_fpga->kill();
75
        exit(0);
76
}
77
 
78
class   XPFLASHSCOPE : public SCOPE {
79
public:
80
        XPFLASHSCOPE(DEVBUS *fpga) : SCOPE(fpga, R_SCOPE, false, true) {
81
                define_traces();
82
        }
83
 
84
        // Inside our design, we have recorded 32-bits of information describing
85
        // what's going on.  Here, we describe the names and widths of the
86
        // components of those 32-bits.  These are used to create a VCD file
87
        // that can be loaded into GTKWave if necessary to see what's going on.
88
        virtual void    define_traces(void) {
89
                register_trace("wb_cyc",      1, 31);
90
                register_trace("wb_stb",      1, 30);
91
                register_trace("flash_sel",   1, 29);
92
                register_trace("flctl_sel",   1, 28);
93
                register_trace("flash_ack",   1, 27);
94
                register_trace("flash_stall", 1, 26);
95
                register_trace("qspi_cs_n",   1, 25); // blank/unused bit next
96
                register_trace("qspi_sck",    2, 23);
97
                register_trace("qspi_mod",    2, 21);
98
                register_trace("o_qspi_dat",  4, 16);
99
                register_trace("i_qspi_dat",  4, 12);
100
                register_trace("flash_data", 12,  0);
101
        }
102
 
103
        // In case you aren't interested in creating a VCD file, we create an
104
        // output decoder, allowing you to "see" (textually) the output.  This
105
        // is the default, although it may be ignored.
106
        virtual void    decode(DEVBUS::BUSW v) const {
107
                printf("%3s%3s %3s%3s %3s%5s",
108
                        ((v>>31)&1)?"CYC":"",
109
                        ((v>>30)&1)?"STB":"",
110
                        ((v>>29)&1)?"SEL":"",
111
                        ((v>>28)&1)?"CTL":"",
112
                        ((v>>27)&1)?"ACK":"",
113
                        ((v>>26)&1)?"STALL":"");
114
                printf("  %2s[%d%d,%d] %x->%x ",
115
                        ((v>>25)&1)?"":"CS",
116
                        ((v>>24)&1), ((v>>23)&1),
117
                        ((v>>21)&3), // Mode
118
                        ((v>>16)&0xf),
119
                        ((v>>12)&0xf));
120
 
121
                printf("%03x", (v&0x0fff));
122
        }
123
};
124
 
125
int main(int argc, char **argv) {
126
        char    szSel[64];
127
 
128
        // First step: connect to our FPGA.
129
        strcpy(szSel, S6SN);
130
        m_fpga = FPGAOPEN(szSel);
131
 
132
        // Second step: create a piece of software to read the scope off of the
133
        // FPGA device, and to decode it later.
134
        XPFLASHSCOPE    *xpscope = new XPFLASHSCOPE(m_fpga);
135
 
136
        // Check if the scope is "ready".  It will be "ready" when the scope
137
        // has been both primed, triggered, and stopped.  If the scope hasn't
138
        // triggered, or hasn't stopped recording, you'll need to come back
139
        // later.
140
        if (xpscope->ready()) {
141
                // The scope is ready.  Hence, it has a buffer filled with
142
                // the data we are looking for.
143
 
144
                // Read the data off of the scope, and print it to the screen
145
                xpscope->print();
146
 
147
                // Should you wish to, you may also create a .VCD file with the
148
                // scopes outputs within it.
149
                xpscope->writevcd("xpscope.vcd");
150
        } else {
151
                //
152
                // If the scope wasn't ready (yet) to be read, lets output
153
                // the state of the scope, so that we can tell what happened
154
                // or more specifically, what hasn't happened.  (For example,
155
                // if the trigger hasn't gone off, then we need to wait longer
156
                // for it to go off.
157
                //
158
                xpscope->decode_control();
159
        }
160
 
161
        delete  m_fpga;
162
}
163
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.