OpenCores
URL https://opencores.org/ocsvn/scan_based_serial_communication/scan_based_serial_communication/trunk

Subversion Repositories scan_based_serial_communication

[/] [scan_based_serial_communication/] [trunk/] [scan_testbench.perl.v] - Blame information for rev 3

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 3 Quanticles
 
2
`define SCAN_DELAY #1
3
 
4
module tbench();
5
 
6
   // Scan
7
   reg       scan_phi, scan_phi_bar, scan_data_in, scan_load_chip, scan_load_chain;
8
   wire      scan_data_out;
9
 
10
   //-----------------------------------------
11
   //  Scan Chain Registers and Tasks
12
   //-----------------------------------------
13
 
14
   // Scan Registers and Initializations
15
 
16
   PERL begin
17
      /*
18
       DEPERLIFY_INCLUDE(scan_signal_list.pl);
19
 
20
       print "`define SCAN_CHAIN_LENGTH $scan_chain_length\n\n";
21
 
22
       for (my $i = 0; $i < scalar @signal_list; $i++) {
23
 
24
          my $begin = 0;
25
          my $end   = $signal_list[$i]{size} - 1;
26
 
27
         print "   reg [$end:$begin] " . $signal_list[$i]{name} . ";\n";
28
         print "   reg [$end:$begin] " . $signal_list[$i]{name} . "_read;\n";
29
         print "   initial " . $signal_list[$i]{name} . " = " .$signal_list[$i]{size} . "'d0;\n";
30
         print "   initial " . $signal_list[$i]{name} . "_read = " .$signal_list[$i]{size} . "'d0;\n";
31
       }
32
 
33
       */
34
   end
35
 
36
   // Scan chain tasks
37
 
38
   task load_chip;
39
      begin
40
         `SCAN_DELAY scan_load_chip = 1;
41
         `SCAN_DELAY scan_load_chip = 0;
42
      end
43
   endtask
44
 
45
   task load_chain;
46
      begin
47
         `SCAN_DELAY scan_load_chain = 1;
48
         `SCAN_DELAY scan_phi = 1;
49
         `SCAN_DELAY scan_phi = 0;
50
         `SCAN_DELAY scan_phi_bar = 1;
51
         `SCAN_DELAY scan_phi_bar = 0;
52
         `SCAN_DELAY scan_load_chain = 0;
53
      end
54
   endtask
55
 
56
   task rotate_chain;
57
 
58
      integer i;
59
 
60
      reg [`SCAN_CHAIN_LENGTH-1:0] data_in;
61
      reg [`SCAN_CHAIN_LENGTH-1:0] data_out;
62
 
63
      begin
64
         PERL begin
65
            /*
66
             DEPERLIFY_INCLUDE(scan_signal_list.pl);
67
 
68
             for (my $i = 0; $i < scalar @signal_list; $i++) {
69
 
70
                my $begin = $signal_list[$i]{start};
71
                my $end   = $signal_list[$i]{start} + $signal_list[$i]{size} - 1;
72
 
73
                print "         data_in[$end:$begin] = " . $signal_list[$i]{name} . ";\n";
74
             }
75
 
76
             */
77
         end
78
 
79
         for (i = 0; i < `SCAN_CHAIN_LENGTH; i=i+1) begin
80
            scan_data_in = data_in[0];
81
            data_out     = {scan_data_out, data_out[`SCAN_CHAIN_LENGTH-1:1]};
82
            `SCAN_DELAY scan_phi = 1;
83
            `SCAN_DELAY scan_phi = 0;
84
            `SCAN_DELAY scan_phi_bar = 1;
85
            `SCAN_DELAY scan_phi_bar = 0;
86
            `SCAN_DELAY data_in = data_in >> 1;
87
         end
88
 
89
         PERL begin
90
            /*
91
             DEPERLIFY_INCLUDE(scan_signal_list.pl);
92
 
93
             for (my $i = 0; $i < scalar @signal_list; $i++) {
94
 
95
                my $begin = $signal_list[$i]{start};
96
                my $end   = $signal_list[$i]{start} + $signal_list[$i]{size} - 1;
97
 
98
                print "         " . $signal_list[$i]{name} . "_read = data_out[$end:$begin];\n";
99
             }
100
 
101
             */
102
         end
103
      end
104
 
105
   endtask
106
 
107
   //-----------------------------------------
108
   //  Scan chain DUT
109
   //-----------------------------------------
110
 
111
   // We're going to use the name chip_iternal_<NAME> for the signals that would
112
   // normally be inside the chip that we're interacting with. We'll generate them
113
   // here
114
 
115
   PERL begin
116
      /*
117
       DEPERLIFY_INCLUDE(scan_signal_list.pl);
118
 
119
       for (my $i = 0; $i < scalar @signal_list; $i++) {
120
           if ($signal_list[$i]{writable} == 1) {
121
                print "    wire ";
122
           } else {
123
                print "    reg  ";
124
           }
125
 
126
            print "[$signal_list[$i]{size}-1:0]  chip_internal_$signal_list[$i]{name};\n";
127
       }
128
 
129
       */
130
   end
131
 
132
   scan scan_dut ( // Inputs & outputs to the chip
133
             PERL begin
134
             /*
135
              DEPERLIFY_INCLUDE(scan_signal_list.pl);
136
 
137
              for (my $i = 0; $i < scalar @signal_list; $i++) {
138
                 print "              .$signal_list[$i]{name}(chip_internal_$signal_list[$i]{name}),\n";
139
              }
140
 
141
              */
142
             end
143
 
144
                   // To the pads
145
                   .scan_phi        (scan_phi),
146
                   .scan_phi_bar    (scan_phi_bar),
147
                   .scan_data_in    (scan_data_in),
148
                   .scan_data_out   (scan_data_out),
149
                   .scan_load_chip  (scan_load_chip),
150
                   .scan_load_chain (scan_load_chain)
151
                   );
152
 
153
 
154
   //-----------------------------------------
155
   //  Testbench
156
   //-----------------------------------------
157
 
158
   initial begin
159
 
160
      $display("Starting scan chain test");
161
 
162
      scan_phi  = 0;
163
      scan_phi_bar = 0;
164
      scan_data_in = 0;
165
      scan_load_chip = 0;
166
      scan_load_chain = 0;
167
 
168
      rotate_chain();
169
      load_chip();
170
 
171
          // Write each variable
172
      write_data_1 = 1'd1;
173
      write_data_2 = 2'd2;
174
      write_data_3 = 3'd3;
175
 
176
      rotate_chain();
177
      load_chip();
178
 
179
      // Check that the chip sees the new variables
180
      if (chip_internal_write_data_1 != 1'd1 ||
181
          chip_internal_write_data_2 != 2'd2 ||
182
          chip_internal_write_data_3 != 3'd3 )
183
        $display("TEST 1 FAILED");
184
      else
185
        $display("TEST 1 PASSED");
186
 
187
      // Set internal values to read out      
188
      chip_internal_read_data_1 = 1'd0;  // As if the chip had this value internally
189
      chip_internal_read_data_2 = 2'd3;
190
      chip_internal_read_data_3 = 3'd5;
191
 
192
      // Read all of the values for both writable and non-writable variables
193
      load_chain();
194
      rotate_chain();
195
 
196
      // Check to see that we read out all values properly
197
      if (write_data_1_read != 1'd1 ||
198
          write_data_2_read != 2'd2 ||
199
          write_data_3_read != 3'd3 ||
200
          read_data_1_read  != 1'd0 ||
201
          read_data_2_read  != 2'd3 ||
202
          read_data_3_read  != 3'd5 ) begin
203
         $display("TEST 2 FAILED");
204
         $display("%d %d %d %d %d %d",
205
                  write_data_1_read,
206
                  write_data_2_read,
207
                  write_data_3_read,
208
                  read_data_1_read,
209
                  read_data_2_read,
210
                  read_data_3_read);
211
      end else
212
        $display("TEST 2 PASSED");
213
 
214
 
215
      $finish;
216
   end
217
 
218
   //////////
219
 
220
endmodule // tbench
221
 
222 2 Quanticles
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.