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[/] [softavrcore/] [trunk/] [synth/] [ram.v] - Blame information for rev 2

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Line No. Rev Author Line
1 2 apal
module ram
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 #(     parameter       ram_width = 9
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 )
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 (      input   clk,
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        input   re,
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        input   we,
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        input   [ram_width-1:0]  addr,
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        output  [7:0]            data_read,
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        input   [7:0]            data_write
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 );
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reg [7:0] ram_array [0:2**ram_width-1];
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reg [7:0] data_out;
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assign data_read = data_out;
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always @(posedge clk) begin
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        if (we) ram_array[addr] <= data_write;
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end
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always @(posedge clk) begin
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        if (re) data_out <= ram_array[addr];
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end
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endmodule

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