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[/] [special_functions_unit/] [Open_source_SFU/] [log2_vhdl/] [parts/] [ones_complement.vhd] - Blame information for rev 4

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-- Nombre de archivo    : ones_complement.vhd
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--      Titulo                          : operacion complemento a uno
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-----------------------------------------------------------------------------   
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-- Descripcion                  : realiza la operacion de complemento a uno al dato de 
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--                                                        entrada solo si i_en es habilitado.
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--
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--      WIDE                            : ancho del dato
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--
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--      i_data                  : dato a operar
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--      i_en                            : 1-> habilita operacion
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--    o_data                    : resultado
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--      
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-- Notas:
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--              si i_en = 0, o_data = i_data
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--
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-----------------------------------------------------------------------------   
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-- Universidad Pedagogica y Tecnologica de Colombia.
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-- Facultad de ingenieria.
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-- Escuela de ingenieria Electronica - extension Tunja.
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-- 
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-- Autor: Cristhian Fernando Moreno Manrique
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-- Marzo 2020
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-----------------------------------------------------------------------------   
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library ieee;
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        use ieee.std_logic_1164.all;
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entity ones_complement is
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        generic (WIDE           : positive := 7);
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                 port(i_data    : in std_logic_vector (WIDE-1 downto 0);
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                                i_en            : in std_logic;
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                                o_data  : out std_logic_vector (WIDE-1 downto 0));
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end ones_complement;
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-----------------------------------------------------------------------------   
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architecture main of ones_complement is
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        signal w_C1 :std_logic_vector(WIDE-1 downto 0);
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begin
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        a:for i in 0 to WIDE-1 generate
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                        w_C1(i)         <= i_data(i) xor i_en;
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        end generate;
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  o_data <= std_logic_vector(w_C1);
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end main;
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-----------------------------------------------------------------------------   

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