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[/] [uart2bus/] [trunk/] [verilog/] [rtl/] [baud_gen.v] - Blame information for rev 2

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1 2 motilito
//---------------------------------------------------------------------------------------
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// baud rate generator for uart 
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//
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// this module has been changed to receive the baud rate dividing counter from registers.
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// the two registers should be calculated as follows:
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// first register:
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//              baud_freq = 16*baud_rate / gcd(global_clock_freq, 16*baud_rate)
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// second register:
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//              baud_limit = (global_clock_freq / gcd(global_clock_freq, 16*baud_rate)) - baud_freq 
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//---------------------------------------------------------------------------------------
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module baud_gen
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(
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        clock, reset,
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        ce_16, baud_freq, baud_limit
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);
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//---------------------------------------------------------------------------------------
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// modules inputs and outputs 
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input                   clock;          // global clock input 
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input                   reset;          // global reset input 
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output                  ce_16;          // baud rate multiplyed by 16 
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input   [11:0]   baud_freq;      // baud rate setting registers - see header description 
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input   [15:0]   baud_limit;
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// internal registers 
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reg ce_16;
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reg [15:0]       counter;
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//---------------------------------------------------------------------------------------
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// module implementation 
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// baud divider counter  
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always @ (posedge clock or posedge reset)
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begin
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        if (reset)
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                counter <= 16'b0;
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        else if (counter >= baud_limit)
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                counter <= counter - baud_limit;
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        else
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                counter <= counter + baud_freq;
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end
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// clock divider output 
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always @ (posedge clock or posedge reset)
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begin
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        if (reset)
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                ce_16 <= 1'b0;
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        else if (counter >= baud_limit)
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                ce_16 <= 1'b1;
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        else
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                ce_16 <= 1'b0;
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end
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endmodule
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//---------------------------------------------------------------------------------------
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//                                              Th.. Th.. Th.. Thats all folks !!!
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//---------------------------------------------------------------------------------------

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