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pjf |
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-- Company:
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-- Engineer:
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--
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-- Create Date: 17:32:02 06/03/2011
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-- Design Name:
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-- Module Name: C:/Users/pjf/Documents/projects/fpga/xilinx/Network/ip1/IPv4_RX_tb.vhd
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-- Project Name: ip1
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-- Target Device:
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-- Tool versions:
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-- Description:
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--
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-- VHDL Test Bench Created by ISE for module: IPv4_RX
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--
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-- Dependencies:
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--
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-- Revision:
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-- Revision 0.01 - File Created
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-- Additional Comments:
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--
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-- Notes:
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-- This testbench has been automatically generated using types std_logic and
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-- std_logic_vector for the ports of the unit under test. Xilinx recommends
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-- that these types always be used for the top-level I/O of a design in order
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-- to guarantee that the testbench will bind correctly to the post-implementation
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-- simulation model.
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--------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.NUMERIC_STD.ALL;
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use work.axi.all;
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use work.ipv4_types.all;
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use work.arp_types.all;
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ENTITY IPv4_RX_tb IS
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END IPv4_RX_tb;
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ARCHITECTURE behavior OF IPv4_RX_tb IS
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-- Component Declaration for the Unit Under Test (UUT)
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COMPONENT IPv4_RX
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PORT(
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-- IP Layer signals
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ip_rx : out ipv4_rx_type;
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ip_rx_start : out std_logic; -- indicates receipt of ip frame.
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-- system signals
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clk : in STD_LOGIC; -- same clock used to clock mac data and ip data
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reset : in STD_LOGIC;
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our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);
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-- MAC layer RX signals
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mac_data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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mac_data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock
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mac_data_in_last : in STD_LOGIC -- indicates last data in frame
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);
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END COMPONENT;
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--Inputs
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signal clk : std_logic := '0';
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signal reset : std_logic := '0';
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signal our_ip_address : std_logic_vector(31 downto 0) := (others => '0');
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signal mac_data_in : std_logic_vector(7 downto 0) := (others => '0');
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signal mac_data_in_valid : std_logic := '0';
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signal mac_data_in_last : std_logic := '0';
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--Outputs
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signal ip_rx_start : std_logic;
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signal ip_rx : ipv4_rx_type;
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-- Clock period definitions
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constant clk_period : time := 8 ns;
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BEGIN
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-- Instantiate the Unit Under Test (UUT)
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uut: IPv4_RX PORT MAP (
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ip_rx => ip_rx,
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ip_rx_start => ip_rx_start,
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clk => clk,
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reset => reset,
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our_ip_address => our_ip_address,
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mac_data_in => mac_data_in,
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mac_data_in_valid => mac_data_in_valid,
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mac_data_in_last => mac_data_in_last
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);
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-- Clock process definitions
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clk_process :process
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begin
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clk <= '0';
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wait for clk_period/2;
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clk <= '1';
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wait for clk_period/2;
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end process;
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-- Stimulus process
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stim_proc: process
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begin
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-- hold reset state for 100 ns.
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wait for 100 ns;
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our_ip_address <= x"c0a80509"; -- 192.168.5.9
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mac_data_in_valid <= '0';
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mac_data_in_last <= '0';
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reset <= '1';
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wait for clk_period*10;
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reset <= '0';
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wait for clk_period*5;
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-- check reset conditions
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assert ip_rx_start = '0' report "ip_rx_start not initialised correctly on reset";
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assert ip_rx.hdr.is_valid = '0' report "ip_rx.hdr.is_valid not initialised correctly on reset";
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assert ip_rx.hdr.protocol = x"00" report "ip_rx.hdr.protocol not initialised correctly on reset";
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assert ip_rx.hdr.data_length = x"0000" report "ip_rx.hdr.data_length not initialised correctly on reset";
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assert ip_rx.hdr.src_ip_addr = x"00000000" report "ip_rx.hdr.src_ip_addr not initialised correctly on reset";
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assert ip_rx.hdr.num_frame_errors = x"00" report "ip_rx.hdr.num_frame_errors not initialised correctly on reset";
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assert ip_rx.data.data_in = x"00" report "ip_rx.data.data_in not initialised correctly on reset";
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assert ip_rx.data.data_in_valid = '0' report "ip_rx.data.data_in_valid not initialised correctly on reset";
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assert ip_rx.data.data_in_last = '0' report "ip_rx.data.data_in_last not initialised correctly on reset";
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-- insert stimulus here
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------------
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-- TEST 1 -- basic functional rx test with received ip pkt
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------------
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report "T1: Send an eth frame with IP pkt dst ip_address c0a80509, dst mac 002320212223";
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mac_data_in_valid <= '1';
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-- dst MAC (bc)
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"23"; wait for clk_period;
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mac_data_in <= x"20"; wait for clk_period;
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mac_data_in <= x"21"; wait for clk_period;
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mac_data_in <= x"22"; wait for clk_period;
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mac_data_in <= x"23"; wait for clk_period;
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-- src MAC
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"23"; wait for clk_period;
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mac_data_in <= x"18"; wait for clk_period;
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mac_data_in <= x"29"; wait for clk_period;
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mac_data_in <= x"26"; wait for clk_period;
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mac_data_in <= x"7c"; wait for clk_period;
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-- type
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mac_data_in <= x"08"; wait for clk_period; -- IP pkt
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mac_data_in <= x"00"; wait for clk_period;
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-- ver & HL / service type
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mac_data_in <= x"45"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- total len
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"18"; wait for clk_period;
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-- ID
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- flags & frag
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- TTL
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mac_data_in <= x"00"; wait for clk_period;
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-- Protocol
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mac_data_in <= x"11"; wait for clk_period;
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-- Header CKS
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- SRC IP
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mac_data_in <= x"c0"; wait for clk_period;
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mac_data_in <= x"a8"; wait for clk_period;
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mac_data_in <= x"05"; wait for clk_period;
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mac_data_in <= x"01"; wait for clk_period;
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-- DST IP
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mac_data_in <= x"c0"; wait for clk_period;
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mac_data_in <= x"a8"; wait for clk_period;
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mac_data_in <= x"05"; wait for clk_period;
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mac_data_in <= x"09"; wait for clk_period;
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-- user data
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mac_data_in <= x"24"; wait for clk_period;
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assert ip_rx.hdr.is_valid = '1' report "T1: ip_rx.hdr.is_valid not set";
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assert ip_rx.hdr.protocol = x"11" report "T1: ip_rx.hdr.protocol not set correctly";
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assert ip_rx.hdr.data_length = x"0004" report "T1: ip_rx.hdr.data_length not set correctly";
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assert ip_rx.hdr.src_ip_addr = x"c0a80501" report "T1: ip_rx.hdr.src_ip_addr not set correctly";
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assert ip_rx.hdr.num_frame_errors = x"00" report "T1: ip_rx.hdr.num_frame_errors not set correctly";
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assert ip_rx.hdr.last_error_code = x"0" report "T1: ip_rx.hdr.last_error_code not set correctly";
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assert ip_rx.hdr.is_broadcast = '0' report "T1: ip_rx.hdr.is_broadcast should not be set";
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assert ip_rx_start = '1' report "T1: ip_rx_start not set";
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assert ip_rx.data.data_in_valid = '1' report "T1: ip_rx.data.data_in_valid not set";
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mac_data_in <= x"25"; wait for clk_period;
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mac_data_in <= x"26"; wait for clk_period;
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mac_data_in <= x"27"; mac_data_in_last <= '1';wait for clk_period;
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assert ip_rx.data.data_in_last = '1' report "T1: ip_rx.data.data_in_last not set";
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mac_data_in <= x"00";
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mac_data_in_last <= '0';
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mac_data_in_valid <= '0';
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wait for clk_period;
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assert ip_rx.data.data_in_valid = '0' report "T1: ip_rx.data.data_in_valid not cleared";
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assert ip_rx.data.data_in_last = '0' report "T1: ip_rx.data.data_in_last not cleared";
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assert ip_rx.hdr.num_frame_errors = x"00" report "T1: ip_rx.hdr.num_frame_errors non zero at end of test";
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assert ip_rx.hdr.last_error_code = x"0" report "T1: ip_rx.hdr.last_error_code indicates error at end of test";
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assert ip_rx_start = '0' report "T1: ip_rx_start not cleared";
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------------
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-- TEST 2 -- basic functional rx test with received ip pkt that is not for us
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------------
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report "T2: Send an eth frame with IP pkt dst ip_address c0a80507, dst mac 002320212223";
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mac_data_in_valid <= '1';
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-- dst MAC (bc)
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"23"; wait for clk_period;
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mac_data_in <= x"20"; wait for clk_period;
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mac_data_in <= x"21"; wait for clk_period;
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mac_data_in <= x"22"; wait for clk_period;
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mac_data_in <= x"23"; wait for clk_period;
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assert ip_rx.hdr.is_valid = '0' report "T2: ip_rx.hdr.is_valid remains set";
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-- src MAC
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"23"; wait for clk_period;
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mac_data_in <= x"18"; wait for clk_period;
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mac_data_in <= x"29"; wait for clk_period;
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mac_data_in <= x"26"; wait for clk_period;
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mac_data_in <= x"7c"; wait for clk_period;
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-- type
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mac_data_in <= x"08"; wait for clk_period; -- IP pkt
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mac_data_in <= x"00"; wait for clk_period;
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-- ver & HL / service type
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mac_data_in <= x"45"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- total len
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"18"; wait for clk_period;
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-- ID
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- flags & frag
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- TTL
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mac_data_in <= x"00"; wait for clk_period;
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-- Protocol
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mac_data_in <= x"11"; wait for clk_period;
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-- Header CKS
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mac_data_in <= x"00"; wait for clk_period;
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mac_data_in <= x"00"; wait for clk_period;
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-- SRC IP
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mac_data_in <= x"c0"; wait for clk_period;
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mac_data_in <= x"a8"; wait for clk_period;
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mac_data_in <= x"05"; wait for clk_period;
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mac_data_in <= x"02"; wait for clk_period;
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-- DST IP
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mac_data_in <= x"c0"; wait for clk_period;
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mac_data_in <= x"a8"; wait for clk_period;
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mac_data_in <= x"05"; wait for clk_period;
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mac_data_in <= x"07"; wait for clk_period;
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-- user data
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mac_data_in <= x"24"; wait for clk_period;
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assert ip_rx.hdr.is_valid = '1' report "T2: ip_rx.hdr.is_valid not set";
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assert ip_rx.hdr.protocol = x"11" report "T2: ip_rx.hdr.protocol not set correctly";
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assert ip_rx.hdr.data_length = x"0004" report "T2: ip_rx.hdr.data_length not set correctly";
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| 274 |
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assert ip_rx.hdr.src_ip_addr = x"c0a80502" report "T2: ip_rx.hdr.src_ip_addr not set correctly";
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assert ip_rx.hdr.num_frame_errors = x"00" report "T2: ip_rx.hdr.num_frame_errors not set correctly";
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| 276 |
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assert ip_rx.hdr.is_broadcast = '0' report "T2: ip_rx.hdr.is_broadcast should not be set";
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| 277 |
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assert ip_rx.hdr.last_error_code = x"0" report "T2: ip_rx.hdr.last_error_code not set correctly";
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| 278 |
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assert ip_rx_start = '0' report "T2: ip_rx_start set when pkt not for us";
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| 279 |
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assert ip_rx.data.data_in_valid = '0' report "T2: ip_rx.data.data_in_valid set when pkt not for us";
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mac_data_in <= x"25"; wait for clk_period;
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mac_data_in <= x"26"; wait for clk_period;
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mac_data_in <= x"27"; mac_data_in_last <= '1';wait for clk_period;
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assert ip_rx.data.data_in_last = '0' report "T2: ip_rx.data.data_in_last set";
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| 286 |
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mac_data_in <= x"00";
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mac_data_in_last <= '0';
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mac_data_in_valid <= '0';
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wait for clk_period;
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| 291 |
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|
| 292 |
|
|
assert ip_rx.data.data_in_valid = '0' report "T2: ip_rx.data.data_in_valid not cleared";
|
| 293 |
|
|
assert ip_rx.data.data_in_last = '0' report "T2: ip_rx.data.data_in_last not cleared";
|
| 294 |
|
|
assert ip_rx.hdr.num_frame_errors = x"00" report "T2: ip_rx.hdr.num_frame_errors non zero at end of test";
|
| 295 |
|
|
assert ip_rx.hdr.last_error_code = x"0" report "T2: ip_rx.hdr.last_error_code indicates error at end of test";
|
| 296 |
|
|
assert ip_rx_start = '0' report "T2: ip_rx_start not cleared";
|
| 297 |
|
|
|
| 298 |
|
|
wait for clk_period*20;
|
| 299 |
|
|
|
| 300 |
|
|
|
| 301 |
|
|
------------
|
| 302 |
|
|
-- TEST 3 -- RX Broadcast pkt
|
| 303 |
|
|
------------
|
| 304 |
|
|
|
| 305 |
|
|
report "T3: Send an eth frame with IP pkt dst ip_address = BC, dst mac = BC";
|
| 306 |
|
|
|
| 307 |
|
|
mac_data_in_valid <= '1';
|
| 308 |
|
|
-- dst MAC (bc)
|
| 309 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 310 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 311 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 312 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 313 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 314 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 315 |
|
|
-- src MAC
|
| 316 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 317 |
|
|
mac_data_in <= x"23"; wait for clk_period;
|
| 318 |
|
|
mac_data_in <= x"18"; wait for clk_period;
|
| 319 |
|
|
mac_data_in <= x"29"; wait for clk_period;
|
| 320 |
|
|
mac_data_in <= x"26"; wait for clk_period;
|
| 321 |
|
|
mac_data_in <= x"7c"; wait for clk_period;
|
| 322 |
|
|
-- type
|
| 323 |
|
|
mac_data_in <= x"08"; wait for clk_period; -- IP pkt
|
| 324 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 325 |
|
|
-- ver & HL / service type
|
| 326 |
|
|
mac_data_in <= x"45"; wait for clk_period;
|
| 327 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 328 |
|
|
-- total len
|
| 329 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 330 |
|
|
mac_data_in <= x"18"; wait for clk_period;
|
| 331 |
|
|
-- ID
|
| 332 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 333 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 334 |
|
|
-- flags & frag
|
| 335 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 336 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 337 |
|
|
-- TTL
|
| 338 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 339 |
|
|
-- Protocol
|
| 340 |
|
|
mac_data_in <= x"11"; wait for clk_period;
|
| 341 |
|
|
-- Header CKS
|
| 342 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 343 |
|
|
mac_data_in <= x"00"; wait for clk_period;
|
| 344 |
|
|
-- SRC IP
|
| 345 |
|
|
mac_data_in <= x"c0"; wait for clk_period;
|
| 346 |
|
|
mac_data_in <= x"a8"; wait for clk_period;
|
| 347 |
|
|
mac_data_in <= x"05"; wait for clk_period;
|
| 348 |
|
|
mac_data_in <= x"01"; wait for clk_period;
|
| 349 |
|
|
-- DST IP
|
| 350 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 351 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 352 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 353 |
|
|
mac_data_in <= x"ff"; wait for clk_period;
|
| 354 |
|
|
|
| 355 |
|
|
-- user data
|
| 356 |
|
|
mac_data_in <= x"24"; wait for clk_period;
|
| 357 |
|
|
|
| 358 |
|
|
assert ip_rx.hdr.is_valid = '1' report "T3: ip_rx.hdr.is_valid not set";
|
| 359 |
|
|
assert ip_rx.hdr.protocol = x"11" report "T3: ip_rx.hdr.protocol not set correctly";
|
| 360 |
|
|
assert ip_rx.hdr.data_length = x"0004" report "T3: ip_rx.hdr.data_length not set correctly";
|
| 361 |
|
|
assert ip_rx.hdr.src_ip_addr = x"c0a80501" report "T3: ip_rx.hdr.src_ip_addr not set correctly";
|
| 362 |
|
|
assert ip_rx.hdr.num_frame_errors = x"00" report "T3: ip_rx.hdr.num_frame_errors not set correctly";
|
| 363 |
|
|
assert ip_rx.hdr.is_broadcast = '1' report "T3: ip_rx.hdr.is_broadcast not set";
|
| 364 |
|
|
assert ip_rx.hdr.last_error_code = x"0" report "T3: ip_rx.hdr.last_error_code not set correctly";
|
| 365 |
|
|
assert ip_rx_start = '1' report "T3: ip_rx_start not set";
|
| 366 |
|
|
assert ip_rx.data.data_in_valid = '1' report "T3: ip_rx.data.data_in_valid not set";
|
| 367 |
|
|
|
| 368 |
|
|
mac_data_in <= x"25"; wait for clk_period;
|
| 369 |
|
|
mac_data_in <= x"26"; wait for clk_period;
|
| 370 |
|
|
mac_data_in <= x"27"; mac_data_in_last <= '1';wait for clk_period;
|
| 371 |
|
|
|
| 372 |
|
|
assert ip_rx.data.data_in_last = '1' report "T3: ip_rx.data.data_in_last not set";
|
| 373 |
|
|
|
| 374 |
|
|
mac_data_in <= x"00";
|
| 375 |
|
|
mac_data_in_last <= '0';
|
| 376 |
|
|
mac_data_in_valid <= '0';
|
| 377 |
|
|
wait for clk_period;
|
| 378 |
|
|
|
| 379 |
|
|
assert ip_rx.data.data_in_valid = '0' report "T3: ip_rx.data.data_in_valid not cleared";
|
| 380 |
|
|
assert ip_rx.data.data_in_last = '0' report "T3: ip_rx.data.data_in_last not cleared";
|
| 381 |
|
|
assert ip_rx.hdr.num_frame_errors = x"00" report "T3: ip_rx.hdr.num_frame_errors non zero at end of test";
|
| 382 |
|
|
assert ip_rx.hdr.last_error_code = x"0" report "T3: ip_rx.hdr.last_error_code indicates error at end of test";
|
| 383 |
|
|
assert ip_rx_start = '0' report "T3: ip_rx_start not cleared";
|
| 384 |
|
|
|
| 385 |
|
|
|
| 386 |
|
|
report "--- end of tests ---";
|
| 387 |
|
|
|
| 388 |
|
|
wait;
|
| 389 |
|
|
end process;
|
| 390 |
|
|
|
| 391 |
|
|
END;
|
