OpenCores
URL https://opencores.org/ocsvn/udp_ip_stack/udp_ip_stack/trunk

Subversion Repositories udp_ip_stack

[/] [udp_ip_stack/] [trunk/] [rtl/] [vhdl/] [UDP_Complete_nomac.vhd] - Blame information for rev 8

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 pjf
----------------------------------------------------------------------------------
2
-- Company: 
3
-- Engineer: 
4
-- 
5
-- Create Date:    09:38:49 06/13/2011 
6
-- Design Name: 
7
-- Module Name:    UDP_Complete_nomac - Behavioral 
8
-- Project Name: 
9
-- Target Devices: 
10
-- Tool versions: 
11
-- Description: 
12
--
13
-- Dependencies: 
14
--
15
-- Revision: 
16
-- Revision 0.01 - File Created
17
-- Revision 0.02 - separated RX and TX clocks
18 4 pjf
-- Revision 0.03 - Added mac_tx_tfirst
19 2 pjf
-- Additional Comments: 
20
--
21
----------------------------------------------------------------------------------
22
library IEEE;
23
use IEEE.STD_LOGIC_1164.ALL;
24
use IEEE.NUMERIC_STD.ALL;
25
use work.axi.all;
26
use work.ipv4_types.all;
27
use work.arp_types.all;
28
 
29
entity UDP_Complete_nomac is
30 8 pjf
         generic (
31
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
32
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
33
                        );
34 2 pjf
    Port (
35
                        -- UDP TX signals
36
                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP
37
                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns
38
                        udp_tx_result                   : out std_logic_vector (1 downto 0);-- tx status (changes during transmission)
39
                        udp_tx_data_out_ready: out std_logic;                                                   -- indicates udp_tx is ready to take data
40
                        -- UDP RX signals
41
                        udp_rx_start                    : out std_logic;                                                        -- indicates receipt of udp header
42
                        udp_rxo                                 : out udp_rx_type;
43
                        -- IP RX signals
44
                        ip_rx_hdr                               : out ipv4_rx_header_type;
45
                        -- system signals
46
                        rx_clk                                  : in  STD_LOGIC;
47
                        tx_clk                                  : in  STD_LOGIC;
48
                        reset                                   : in  STD_LOGIC;
49
                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);
50
                        our_mac_address                 : in std_logic_vector (47 downto 0);
51 8 pjf
                        control                                 : in udp_control_type;
52 2 pjf
                        -- status signals
53
                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received
54
                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us
55
                        -- MAC Transmitter
56
                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx
57
                        mac_tx_tvalid        : out  std_logic;                                                  -- tdata is valid
58
                        mac_tx_tready        : in std_logic;                                                    -- mac is ready to accept data
59 4 pjf
                        mac_tx_tfirst        : out  std_logic;                                                  -- indicates first byte of frame
60 2 pjf
                        mac_tx_tlast         : out  std_logic;                                                  -- indicates last byte of frame
61
                        -- MAC Receiver
62
                        mac_rx_tdata         : in std_logic_vector(7 downto 0);  -- data byte received
63
                        mac_rx_tvalid        : in std_logic;                                                    -- indicates tdata is valid
64
                        mac_rx_tready        : out  std_logic;                                                  -- tells mac that we are ready to take data
65
                        mac_rx_tlast         : in std_logic                                                             -- indicates last byte of the trame
66
                        );
67
end UDP_Complete_nomac;
68
 
69
 
70
architecture structural of UDP_Complete_nomac is
71
 
72
  ------------------------------------------------------------------------------
73
  -- Component Declaration for UDP TX
74
  ------------------------------------------------------------------------------
75
 
76
    COMPONENT UDP_TX
77
    PORT(
78
                        -- UDP Layer signals
79
                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP
80
                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns
81
                        udp_tx_result                   : out std_logic_vector (1 downto 0);-- tx status (changes during transmission)
82
                        udp_tx_data_out_ready: out std_logic;                                                   -- indicates udp_tx is ready to take data
83
                        -- system signals
84
                        clk                                             : in  STD_LOGIC;                                                        -- same clock used to clock mac data and ip data
85
                        reset                                   : in  STD_LOGIC;
86
                        -- IP layer TX signals
87
                        ip_tx_start                             : out std_logic;
88
                        ip_tx                                           : out ipv4_tx_type;                                                     -- IP tx cxns
89
                        ip_tx_result                    : in std_logic_vector (1 downto 0);              -- tx status (changes during transmission)
90
                        ip_tx_data_out_ready    : in std_logic                                                                  -- indicates IP TX is ready to take data
91
                        );
92
    END COMPONENT;
93
 
94
  ------------------------------------------------------------------------------
95
  -- Component Declaration for UDP RX
96
  ------------------------------------------------------------------------------
97
 
98
    COMPONENT UDP_RX
99
    PORT(
100
                        -- UDP Layer signals
101
                        udp_rx_start                    : out std_logic;                                                        -- indicates receipt of udp header
102
                        udp_rxo                                 : out udp_rx_type;
103
                        -- system signals
104
                        clk                                             : in  STD_LOGIC;
105
                        reset                                   : in  STD_LOGIC;
106
                        -- IP layer RX signals
107
                        ip_rx_start                             : in std_logic;                                                 -- indicates receipt of ip header
108
                        ip_rx                                           : in ipv4_rx_type
109
                        );
110
    END COMPONENT;
111
 
112
  ------------------------------------------------------------------------------
113
  -- Component Declaration for the IP layer
114
  ------------------------------------------------------------------------------
115
 
116
component IP_complete_nomac
117 8 pjf
         generic (
118
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
119
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
120
                        );
121 2 pjf
    Port (
122
                        -- IP Layer signals
123
                        ip_tx_start                             : in std_logic;
124
                        ip_tx                                           : in ipv4_tx_type;                                                              -- IP tx cxns
125
                        ip_tx_result                    : out std_logic_vector (1 downto 0);             -- tx status (changes during transmission)
126
                        ip_tx_data_out_ready    : out std_logic;                                                                        -- indicates IP TX is ready to take data
127
                        ip_rx_start                             : out std_logic;                                                                        -- indicates receipt of ip frame.
128
                        ip_rx                                           : out ipv4_rx_type;
129
                        -- system signals
130
                        rx_clk                                  : in  STD_LOGIC;
131
                        tx_clk                                  : in  STD_LOGIC;
132
                        reset                                   : in  STD_LOGIC;
133
                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);
134
                        our_mac_address                 : in std_logic_vector (47 downto 0);
135 8 pjf
                        control                                 : in ip_control_type;
136 2 pjf
                        -- status signals
137 4 pjf
                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received
138
                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us
139 2 pjf
                        -- MAC Transmitter
140
                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx
141 4 pjf
                        mac_tx_tvalid        : out  std_logic;                                                  -- tdata is valid
142
                        mac_tx_tready        : in std_logic;                                                    -- mac is ready to accept data
143
                        mac_tx_tfirst        : out  std_logic;                                                  -- indicates first byte of frame
144
                        mac_tx_tlast         : out  std_logic;                                                  -- indicates last byte of frame
145 2 pjf
                        -- MAC Receiver
146 4 pjf
                        mac_rx_tdata         : in std_logic_vector(7 downto 0);  -- data byte received
147
                        mac_rx_tvalid        : in std_logic;                                                    -- indicates tdata is valid
148
                        mac_rx_tready        : out  std_logic;                                                  -- tells mac that we are ready to take data
149
                        mac_rx_tlast         : in std_logic                                                             -- indicates last byte of the trame
150 2 pjf
                        );
151
end component;
152
 
153
        -- IP TX connectivity
154
   signal ip_tx_int                                             : ipv4_tx_type;
155
   signal ip_tx_start_int                               : std_logic;
156
        signal ip_tx_result_int                         : std_logic_vector (1 downto 0);
157
        signal ip_tx_data_out_ready_int : std_logic;
158
 
159
        -- IP RX connectivity
160
   signal ip_rx_int                     : ipv4_rx_type;
161
   signal ip_rx_start_int       : std_logic := '0';
162
 
163
 
164
begin
165
 
166
        -- output followers
167
        ip_rx_hdr <= ip_rx_int.hdr;
168
 
169
        -- Instantiate the UDP TX block
170 8 pjf
   udp_tx_block: UDP_TX
171
                        PORT MAP (
172 2 pjf
                                -- UDP Layer signals
173
                                udp_tx_start                    => udp_tx_start,
174
                                udp_txi                                         => udp_txi,
175
                                udp_tx_result                   => udp_tx_result,
176
                                udp_tx_data_out_ready=> udp_tx_data_out_ready,
177
                                -- system signals
178
                                clk                                             => tx_clk,
179
                                reset                                   => reset,
180
                                -- IP layer TX signals
181
                                ip_tx_start                     => ip_tx_start_int,
182
                                ip_tx                                   => ip_tx_int,
183
                                ip_tx_result                    => ip_tx_result_int,
184
                                ip_tx_data_out_ready    => ip_tx_data_out_ready_int
185
        );
186
 
187
        -- Instantiate the UDP RX block
188
   udp_rx_block: UDP_RX PORT MAP (
189
                                 -- UDP Layer signals
190
                                 udp_rxo                                => udp_rxo,
191
                                 udp_rx_start                   => udp_rx_start,
192
                                 -- system signals
193
                                 clk                                            => rx_clk,
194
                                 reset                                  => reset,
195
                                 -- IP layer RX signals
196
                                 ip_rx_start                    => ip_rx_start_int,
197
                                 ip_rx                                  => ip_rx_int
198
        );
199
 
200
   ------------------------------------------------------------------------------
201
   -- Instantiate the IP layer
202
   ------------------------------------------------------------------------------
203 8 pjf
    IP_block : IP_complete_nomac
204
                generic map (
205
                         CLOCK_FREQ                     => CLOCK_FREQ,
206
                         ARP_TIMEOUT            => ARP_TIMEOUT
207
                         )
208
                PORT MAP (
209 2 pjf
                                -- IP interface
210
                                ip_tx_start                     => ip_tx_start_int,
211
                                ip_tx                                   => ip_tx_int,
212
                                ip_tx_result                    => ip_tx_result_int,
213
                                ip_tx_data_out_ready    => ip_tx_data_out_ready_int,
214
                                ip_rx_start                     => ip_rx_start_int,
215
                                ip_rx                                   => ip_rx_int,
216
                                -- System interface
217
                                rx_clk                                  => rx_clk,
218
                                tx_clk                                  => tx_clk,
219
                                reset                                   => reset,
220
                                our_ip_address          => our_ip_address,
221
                                our_mac_address                 => our_mac_address,
222 8 pjf
                                control                                 => control.ip_controls,
223 2 pjf
                                -- status signals
224
                                arp_pkt_count                   => arp_pkt_count,
225
                                ip_pkt_count                    => ip_pkt_count,
226
                                -- MAC Transmitter
227
                                mac_tx_tdata                    => mac_tx_tdata,
228
                                mac_tx_tvalid                   => mac_tx_tvalid,
229
                                mac_tx_tready                   => mac_tx_tready,
230 4 pjf
                                mac_tx_tfirst                   => mac_tx_tfirst,
231 2 pjf
                                mac_tx_tlast                    => mac_tx_tlast,
232
                                -- MAC Receiver
233
                                mac_rx_tdata                    => mac_rx_tdata,
234
                                mac_rx_tvalid                   => mac_rx_tvalid,
235
                                mac_rx_tready                   => mac_rx_tready,
236
                                mac_rx_tlast                    => mac_rx_tlast
237
        );
238
 
239
 
240
end structural;
241
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.